[coreboot] New patch to review for coreboot: e973da4 Refactor src/southbridge/intel/i82801ex/smbus.h
Idwer Vollering (vidwer@gmail.com)
gerrit at coreboot.org
Sat Nov 5 20:05:16 CET 2011
Idwer Vollering (vidwer at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/415
-gerrit
commit e973da4cfb41d2f6ed13f2b6b8cfc2ccd8cfdb3d
Author: Idwer Vollering <vidwer at gmail.com>
Date: Sat Nov 5 20:02:29 2011 +0100
Refactor src/southbridge/intel/i82801ex/smbus.h
Change-Id: I8be22f0292e322562b117f1e8bf493ed25eb4bec
Signed-off-by: Idwer Vollering <vidwer at gmail.com>
---
src/southbridge/intel/i82801ex/early_smbus.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/src/southbridge/intel/i82801ex/early_smbus.c b/src/southbridge/intel/i82801ex/early_smbus.c
index 37799a8..400ac50 100644
--- a/src/southbridge/intel/i82801ex/early_smbus.c
+++ b/src/southbridge/intel/i82801ex/early_smbus.c
@@ -7,7 +7,11 @@ static void enable_smbus(void)
print_spew("SMBus controller enabled\n");
pci_write_config32(dev, SMB_BASE, SMBUS_IO_BASE | 1);
- printk(BIOS_DEBUG, "SMB_BASE = 0x%x\n", pci_read_config32(dev, SMB_BASE));
+
+ print_debug("SMB_BASE = 0x")
+ print_debug_hex32(pci_read_config32(dev, SMB_BASE));
+ print_debug("\n");
+
/* Set smbus enable */
pci_write_config8(dev, 0x40, 1);
/* Set smbus iospace enable */
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