[coreboot] [commit] r6554 - trunk/src/cpu/intel/model_6ex

[Sven Schnelle]

Stefan Reinauer <stefan.reinauer at coreboot.org> writes:

> * Sven Schnelle <svens at stackframe.org> [110503 10:23]:
>> Hi Paul,
>> 
>> Paul Menzel <paulepanter at users.sourceforge.net> writes:
>> 
>> > Am Dienstag, den 03.05.2011, 09:55 +0200 schrieb repository service:
>> >> Author: svens
>> >> Date: Tue May  3 09:55:43 2011
>> >> New Revision: 6554
>> >> URL: https://tracker.coreboot.org/trac/coreboot/changeset/6554
>> >> 
>> >> Log:
>> >> Enable caching for ROM area in model_6ex/cache_as_ram.inc
>> >
>> > it would be great if you could add a small comment to the commit message
>> > if that change improved anything or not.
>> 
>> See my other mail to Stefan and Eric - Stage loading time decreased from
>> 1.9s to around 100ms, which is pretty nice :)
>
> Can you do a new analysis on where the boot time goes now? It would be
> nice to see if there are more optimizations we can do...

Will do. But right now i have the problem that the Keyboard isn't
working on cold boot - seabios is probably started so early that some
hardware parts are not finished with reset or similar things.

Just enabling debug output in coreboot slows down things enough to
make the Keyboard working again.

The original Vendor BIOS talks after around ~1s to the Keyboard
controller, so that's quite different to coreboot (coreboot is handing
over to seabios after ~200ms)

So i want to figure out first if there's some
'i-finished-reset-you-can-talk-to-me' flag, or if that problem is caused
by another reason.

Sven.