[coreboot] Troubles with 17'' WXGA on Roda RK886EX

Vitaly Chertovskih chertovs at gmail.com
Thu Mar 3 20:08:41 CET 2011


Hi!

I'm experiencing some troubles with VGA on notebook "Roda RF8". That
notebook's motherboard and other specification is exact to Roda RK886EX,
only the screen is larger (17'' WXGA 1440x900).
On that week I installed coreboot on Roda RK886EX, it starts perfectly. But
when i flashed the same coreboot on notebook RF8 - the screen is lightened,
but remains blank. When i connect external LCD - it(external) works well
with coreboot. So, i think, that the trouble is in initialization of that
internal widescreen LCD.

Roda RK886EX have LCD 15.1“ XGA (1024x768) - works perfect.
Roda RF8 - 17'' WXGA 1440x900 - blank (but lightened) screen (other init and
OS booting is perfect with external LCD)

The log file says nothing - when coreboot or seabios calls vga.bin - all is
ok, like on Roda RK886EX.

Please, help me. Where and how i can fix that?

P.S.

I build coreboot, choosing Roda motherboard, adding compiled SeaBIOS image
(I download it from coreboot.org), and including VGA onboard rom, grabbed
from /dev/mem as described in howtos on coreboot.org.

I include my log from COM1.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20110303/8f64ec55/attachment.html>
-------------- next part --------------
?



coreboot-4.0-r6411- ??? ???  3 23:00:03 MSK 2011 starting...



Mobile Intel(R) 82945GM/GME Express Chipset

(G)MCH capable of up to FSB 800 MHz

(G)MCH capable of up to DDR2-667

Setting up static southbridge registers... GPIOS... done.

Disabling Watchdog reboot... done.

Setting up static northbridge registers... done.

Waiting for MCHBAR to come up...ok

PM1_CNT: 00001c00

SMBus controller enabled.

Setting up RAM controller.

This mainboard supports Dual Channel Operation.

DDR II Channel 0 Socket 0: x8DDS

DDR II Channel 1 Socket 0: N/A

SLP S4# Assertion Width Violation.

Reset required.





coreboot-4.0-r6411- ??? ???  3 23:00:03 MSK 2011 starting...



Mobile Intel(R) 82945GM/GME Express Chipset

(G)MCH capable of up to FSB 800 MHz

(G)MCH capable of up to DDR2-667

Setting up static southbridge registers... GPIOS... done.

Disabling Watchdog reboot... done.

Setting up static northbridge registers... done.

Waiting for MCHBAR to come up...ok

PM1_CNT: 00001c00

SMBus controller enabled.

Setting up RAM controller.

This mainboard supports Dual Channel Operation.

DDR II Channel 0 Socket 0: x8DDS

DDR II Channel 1 Socket 0: N/A

Memory will be driven at 400MHz with CAS=3 clocks

tRAS = 9 cycles

tRP = 3 cycles

tRCD = 3 cycles

Refresh: 7.8us

tWR = 3 cycles

DIMM 0 side 0 = 1024 MB

DIMM 0 side 1 = 1024 MB

tRFC = 26 cycles

Setting Graphics Frequency... 

FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz

Setting Memory Frequency... CLKCFG=0x00010023, ok (unchanged)

Setting mode of operation for memory channels...Single Channel 0 only.

Programming Clock Crossing...MEM=400 FSB=667... ok

Setting RAM size... 

C0DRB = 0x40404020

C1DRB = 0x00000000

TOLUD = 0x0080

Setting row attributes... 

C0DRA = 0x0033

C1DRA = 0x0000

DIMM0 has 8 banks.

one dimm per channel config.. 

Initializing System Memory IO... 

Programming Dual Channel RCOMP

Table Index: 19

Programming DLL Timings... 

Enabling System Memory IO... 

jedec enable sequence: bank 0

jedec enable sequence: bank 1

bankaddr from bank size of rank 0

receive_enable_autoconfig() for channel 0

  find_strobes_low()

    set_receive_enable() medium=0x3, coarse=0x3

    set_receive_enable() medium=0x1, coarse=0x3

    set_receive_enable() medium=0x1, coarse=0x3

  find_strobes_edge()

    set_receive_enable() medium=0x1, coarse=0x3

  add_quarter_clock() mediumcoarse=0d fine=92

    set_receive_enable() medium=0x3, coarse=0x3

  find_preamble()

    set_receive_enable() medium=0x3, coarse=0x2

    set_receive_enable() medium=0x3, coarse=0x1

  add_quarter_clock() mediumcoarse=07 fine=12

  normalize()

    set_receive_enable() medium=0x0, coarse=0x2

RAM initialization finished.

Setting up Egress Port RCRB

Loading port arbitration table ...ok

Wait for VC1 negotiation ...ok

Setting up DMI RCRB

Wait for VC1 negotiation ...done..

Internal graphics: enabled

Waiting for DMI hardware...ok

Enabling PCI Express x16 Link

SLOTSTS: 0000

Disabling PCI Express x16 Link

Wait for link to enter detect state... ok

Setting up Root Complex Topology

Loading image.

Check CBFS header at fffeffe0

magic is 4f524243

Found CBFS header at fffeffe0

Check cmos_layout.bin

CBFS: follow chain: fff00000 + 28 + 54f + align -> fff00580

Check pci8086,27ae.rom

CBFS: follow chain: fff00580 + 38 + 10000 + align -> fff105c0

Check fallback/coreboot_ram

Stage: loading fallback/coreboot_ram @ 0x100000 (409600 bytes), entry @ 0x100000

Stage: done loading.

Jumping to image.

POST: 0x80

POST: 0x39

coreboot-4.0-r6411- ??? ???  3 23:00:03 MSK 2011 booting...

POST: 0x40

Enumerating buses...

Show all devs...Before device enumeration.

Root Device: enabled 1

APIC_CLUSTER: 0: enabled 1

APIC: 00: enabled 1

PCI_DOMAIN: 0000: enabled 1

PCI: 00:00.0: enabled 1

PCI: 00:1b.0: enabled 1

PCI: 00:1c.0: enabled 1

PCI: 00:1c.1: enabled 1

PCI: 00:1c.2: enabled 1

PCI: 00:1d.0: enabled 1

PCI: 00:1d.1: enabled 1

PCI: 00:1d.2: enabled 1

PCI: 00:1d.3: enabled 1

PCI: 00:1d.7: enabled 1

PCI: 00:1e.0: enabled 1

PCI: 00:03.0: enabled 1

PCI: 00:03.1: enabled 1

PCI: 00:03.2: enabled 1

PCI: 00:03.3: enabled 0

PCI: 00:1f.0: enabled 1

PNP: 002e.1: enabled 1

PNP: 002e.2: enabled 1

PNP: 002e.3: enabled 1

PNP: 002e.5: enabled 0

PNP: 00ff.1: enabled 1

PCI: 00:1f.2: enabled 1

PCI: 00:1f.3: enabled 1

Compare with tree...

Root Device: enabled 1

 APIC_CLUSTER: 0: enabled 1

  APIC: 00: enabled 1

 PCI_DOMAIN: 0000: enabled 1

  PCI: 00:00.0: enabled 1

  PCI: 00:1b.0: enabled 1

  PCI: 00:1c.0: enabled 1

  PCI: 00:1c.1: enabled 1

  PCI: 00:1c.2: enabled 1

  PCI: 00:1d.0: enabled 1

  PCI: 00:1d.1: enabled 1

  PCI: 00:1d.2: enabled 1

  PCI: 00:1d.3: enabled 1

  PCI: 00:1d.7: enabled 1

  PCI: 00:1e.0: enabled 1

   PCI: 00:03.0: enabled 1

   PCI: 00:03.1: enabled 1

   PCI: 00:03.2: enabled 1

   PCI: 00:03.3: enabled 0

  PCI: 00:1f.0: enabled 1

   PNP: 002e.1: enabled 1

   PNP: 002e.2: enabled 1

   PNP: 002e.3: enabled 1

   PNP: 002e.5: enabled 0

   PNP: 00ff.1: enabled 1

  PCI: 00:1f.2: enabled 1

  PCI: 00:1f.3: enabled 1

Display I/O: 0x35

scan_static_bus for Root Device

APIC_CLUSTER: 0 enabled

PCI_DOMAIN: 0000 enabled

PCI_DOMAIN: 0000 scanning...

PCI: pci_scan_bus for bus 00

POST: 0x24

PCI: 00:00.0 [8086/27ac] enabled

PCI: 00:02.0 [8086/27ae] enabled

PCI: 00:02.1 [8086/27a6] ops

PCI: 00:02.1 [8086/27a6] enabled

PCI: Static device PCI: 00:1b.0 not found, disabling it.

PCI: 00:1c.0 [8086/27d0] bus ops

PCI: 00:1c.0 [8086/27d0] enabled

PCI: Static device PCI: 00:1c.1 not found, disabling it.

PCI: Static device PCI: 00:1c.2 not found, disabling it.

PCI: 00:1c.3 [8086/27d6] bus ops

PCI: 00:1c.3 [8086/27d6] enabled

PCI: 00:1d.0 [8086/27c8] ops

PCI: 00:1d.0 [8086/27c8] enabled

PCI: 00:1d.1 [8086/27c9] ops

PCI: 00:1d.1 [8086/27c9] enabled

PCI: 00:1d.2 [8086/27ca] ops

PCI: 00:1d.2 [8086/27ca] enabled

PCI: 00:1d.3 [8086/27cb] ops

PCI: 00:1d.3 [8086/27cb] enabled

PCI: 00:1d.7 [8086/27cc] ops

PCI: 00:1d.7 [8086/27cc] enabled

PCI: 00:1e.0 [8086/2448] bus ops

PCI: 00:1e.0 [8086/2448] enabled

PCI: 00:1e.2 [8086/27de] ops

PCI: 00:1e.2 [8086/27de] enabled

PCI: 00:1f.0 [8086/27bd] bus ops

PCI: 00:1f.0 [8086/27bd] enabled

PCI: 00:1f.2 [8086/27c4] ops

PCI: 00:1f.2 [8086/27c4] enabled

PCI: 00:1f.3 [8086/27da] bus ops

PCI: 00:1f.3 [8086/27da] enabled

POST: 0x25

do_pci_scan_bridge for PCI: 00:1c.0

PCI: pci_scan_bus for bus 01

POST: 0x24

PCI: Using configuration type 1

POST: 0x25

PCI: pci_scan_bus returning with max=001

POST: 0x55

do_pci_scan_bridge returns max 1

do_pci_scan_bridge for PCI: 00:1c.3

PCI: pci_scan_bus for bus 02

POST: 0x24

PCI: 02:00.0 [10ec/8168] ops

PCI: 02:00.0 [10ec/8168] enabled

POST: 0x25

PCI: pci_scan_bus returning with max=002

POST: 0x55

do_pci_scan_bridge returns max 2

do_pci_scan_bridge for PCI: 00:1e.0

PCI: pci_scan_bus for bus 03

POST: 0x24

PCI: 03:03.0 [104c/ac8e] bus ops

PCI: 03:03.0 [104c/ac8e] enabled

PCI: 03:03.1 [104c/ac8e] bus ops

PCI: 03:03.1 [104c/ac8e] enabled

PCI: 03:03.2 [104c/802e] ops

PCI: 03:03.2 [104c/802e] enabled

PCI: 03:03.3 [104c/ac8f] disabled

POST: 0x25

do_pci_scan_bridge for PCI: 03:03.0

PCI: pci_scan_bus for bus 04

POST: 0x24

POST: 0x25

PCI: pci_scan_bus returning with max=004

POST: 0x55

do_pci_scan_bridge returns max 4

do_pci_scan_bridge for PCI: 03:03.1

PCI: pci_scan_bus for bus 05

POST: 0x24

POST: 0x25

PCI: pci_scan_bus returning with max=005

POST: 0x55

do_pci_scan_bridge returns max 5

PCI: pci_scan_bus returning with max=005

POST: 0x55

do_pci_scan_bridge returns max 5

scan_static_bus for PCI: 00:1f.0

PNP: 002e.1 enabled

PNP: 002e.2 enabled

PNP: 002e.3 enabled

PNP: 002e.5 disabled

PNP: 00ff.1 enabled

PNP: 00ff.0 enabled

scan_static_bus for PCI: 00:1f.0 done

scan_static_bus for PCI: 00:1f.3

scan_static_bus for PCI: 00:1f.3 done

PCI: pci_scan_bus returning with max=005

POST: 0x55

scan_static_bus for Root Device done

done

POST: 0x66

Setting up VGA for PCI: 00:02.0

Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000

Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

Allocating resources...

Reading resources...

Root Device read_resources bus 0 link: 0

APIC_CLUSTER: 0 read_resources bus 0 link: 0

APIC: 00 missing read_resources

APIC_CLUSTER: 0 read_resources bus 0 link: 0 done

PCI_DOMAIN: 0000 read_resources bus 0 link: 0

PCI: 00:1c.0 read_resources bus 1 link: 0

PCI: 00:1c.0 read_resources bus 1 link: 0 done

PCI: 00:1c.3 read_resources bus 2 link: 0

PCI: 00:1c.3 read_resources bus 2 link: 0 done

PCI: 00:1e.0 read_resources bus 3 link: 0

PCI: 03:03.0 read_resources bus 4 link: 0

PCI: 03:03.0 read_resources bus 4 link: 0 done

PCI: 03:03.1 read_resources bus 5 link: 0

PCI: 03:03.1 read_resources bus 5 link: 0 done

PCI: 00:1e.0 read_resources bus 3 link: 0 done

PCI: 00:1f.0 read_resources bus 0 link: 0

PNP: 00ff.1 missing read_resources

PCI: 00:1f.0 read_resources bus 0 link: 0 done

PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done

Root Device read_resources bus 0 link: 0 done

Done reading resources.

Show resources in subtree (Root Device)...After reading.

 Root Device child on link 0 APIC_CLUSTER: 0

  APIC_CLUSTER: 0 child on link 0 APIC: 00

   APIC: 00

  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0

  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

   PCI: 00:00.0

   PCI: 00:02.0

   PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10

   PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14

   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18

   PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c

   PCI: 00:02.1

   PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10

   PCI: 00:1b.0

   PCI: 00:1c.0

   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

   PCI: 00:1c.1

   PCI: 00:1c.2

   PCI: 00:1c.3 child on link 0 PCI: 02:00.0

   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

    PCI: 02:00.0

    PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

    PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

    PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30

   PCI: 00:1d.0

   PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

   PCI: 00:1d.1

   PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

   PCI: 00:1d.2

   PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

   PCI: 00:1d.3

   PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

   PCI: 00:1d.7

   PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10

   PCI: 00:1e.0 child on link 0 PCI: 03:03.0

   PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

    PCI: 03:03.0

    PCI: 03:03.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

    PCI: 03:03.0 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 2c

    PCI: 03:03.0 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 34

    PCI: 03:03.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c

    PCI: 03:03.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24

    PCI: 03:03.1

    PCI: 03:03.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

    PCI: 03:03.1 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 2c

    PCI: 03:03.1 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 34

    PCI: 03:03.1 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c

    PCI: 03:03.1 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24

    PCI: 03:03.2

    PCI: 03:03.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10

    PCI: 03:03.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14

    PCI: 03:03.3

   PCI: 00:1e.2

   PCI: 00:1e.2 resource base 0 size 200 align 9 gran 9 limit ffffffff flags 200 index 18

   PCI: 00:1e.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 1c

   PCI: 00:1f.0 child on link 0 PNP: 002e.1

   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100

   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

    PNP: 002e.1

    PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60

    PNP: 002e.1 resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70

    PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74

    PNP: 002e.2

    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60

    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70

    PNP: 002e.3

    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60

    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70

    PNP: 002e.5

    PNP: 002e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60

    PNP: 002e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62

    PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70

    PNP: 00ff.1

    PNP: 00ff.0

   PCI: 00:1f.2

   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10

   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14

   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

   PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20

   PCI: 00:1f.2 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24

   PCI: 00:1f.3

   PCI: 00:1f.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

PCI: 02:00.0 10 *  [0x0 - 0xff] io

PCI: 00:1c.3 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done

PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

PCI: 03:03.0 2c *  [0x0 - 0xfff] io

PCI: 03:03.0 34 *  [0x1000 - 0x1fff] io

PCI: 03:03.1 2c *  [0x2000 - 0x2fff] io

PCI: 03:03.1 34 *  [0x3000 - 0x3fff] io

PCI: 00:1e.0 compute_resources_io: base: 4000 size: 4000 align: 12 gran: 12 limit: ffff done

PCI: 00:1e.0 1c *  [0x0 - 0x3fff] io

PCI: 00:1c.3 1c *  [0x4000 - 0x4fff] io

PCI: 00:1d.0 20 *  [0x5000 - 0x501f] io

PCI: 00:1d.1 20 *  [0x5020 - 0x503f] io

PCI: 00:1d.2 20 *  [0x5040 - 0x505f] io

PCI: 00:1d.3 20 *  [0x5060 - 0x507f] io

PCI: 00:1f.3 20 *  [0x5080 - 0x509f] io

PCI: 00:1f.2 20 *  [0x50a0 - 0x50af] io

PCI: 00:02.0 14 *  [0x50b0 - 0x50b7] io

PCI: 00:1f.2 10 *  [0x50b8 - 0x50bf] io

PCI: 00:1f.2 18 *  [0x50c0 - 0x50c7] io

PCI: 00:1f.2 14 *  [0x50c8 - 0x50cb] io

PCI: 00:1f.2 1c *  [0x50cc - 0x50cf] io

PCI_DOMAIN: 0000 compute_resources_io: base: 50d0 size: 50d0 align: 12 gran: 0 limit: ffff done

PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done

PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

PCI: 02:00.0 30 *  [0x0 - 0x1ffff] mem

PCI: 02:00.0 18 *  [0x20000 - 0x20fff] mem

PCI: 00:1c.3 compute_resources_mem: base: 21000 size: 100000 align: 20 gran: 20 limit: ffffffff done

PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

PCI: 03:03.0 1c *  [0x0 - 0x1ffffff] prefmem

PCI: 03:03.1 1c *  [0x2000000 - 0x3ffffff] prefmem

PCI: 00:1e.0 compute_resources_prefmem: base: 4000000 size: 4000000 align: 20 gran: 20 limit: ffffffff done

PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

PCI: 03:03.2 14 *  [0x0 - 0x3fff] mem

PCI: 03:03.0 24 *  [0x4000 - 0x2003fff] mem

PCI: 03:03.1 24 *  [0x2004000 - 0x4003fff] mem

PCI: 03:03.0 10 *  [0x4004000 - 0x4004fff] mem

PCI: 03:03.1 10 *  [0x4005000 - 0x4005fff] mem

PCI: 03:03.2 10 *  [0x4006000 - 0x40067ff] mem

PCI: 00:1e.0 compute_resources_mem: base: 4006800 size: 4100000 align: 20 gran: 20 limit: ffffffff done

PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

PCI: 00:1e.0 20 *  [0x10000000 - 0x140fffff] mem

PCI: 00:1e.0 24 *  [0x14100000 - 0x180fffff] prefmem

PCI: 00:1c.3 20 *  [0x18100000 - 0x181fffff] mem

PCI: 00:02.0 10 *  [0x18200000 - 0x1827ffff] mem

PCI: 00:02.1 10 *  [0x18280000 - 0x182fffff] mem

PCI: 00:02.0 1c *  [0x18300000 - 0x1833ffff] mem

PCI: 00:1d.7 10 *  [0x18340000 - 0x183403ff] mem

PCI: 00:1f.2 24 *  [0x18340400 - 0x183407ff] mem

PCI: 00:1e.2 18 *  [0x18340800 - 0x183409ff] mem

PCI: 00:1e.2 1c *  [0x18340a00 - 0x18340aff] mem

PCI_DOMAIN: 0000 compute_resources_mem: base: 18340b00 size: 18340b00 align: 28 gran: 0 limit: ffffffff done

avoid_fixed_resources: PCI_DOMAIN: 0000

avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff

avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff

constrain_resources: PCI_DOMAIN: 0000

constrain_resources: PCI: 00:00.0

constrain_resources: PCI: 00:02.0

constrain_resources: PCI: 00:02.1

constrain_resources: PCI: 00:1c.0

constrain_resources: PCI: 00:1c.3

constrain_resources: PCI: 02:00.0

constrain_resources: PCI: 00:1d.0

constrain_resources: PCI: 00:1d.1

constrain_resources: PCI: 00:1d.2

constrain_resources: PCI: 00:1d.3

constrain_resources: PCI: 00:1d.7

constrain_resources: PCI: 00:1e.0

constrain_resources: PCI: 03:03.0

constrain_resources: PCI: 03:03.1

constrain_resources: PCI: 03:03.2

constrain_resources: PCI: 00:1e.2

constrain_resources: PCI: 00:1f.0

constrain_resources: PNP: 002e.1

constrain_resources: PNP: 002e.2

constrain_resources: PNP: 002e.3

constrain_resources: PNP: 00ff.1

constrain_resources: PNP: 00ff.0

constrain_resources: PCI: 00:1f.2

constrain_resources: PCI: 00:1f.3

avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff

	lim->base 00001000 lim->limit 0000ffff

avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff

	lim->base 00000000 lim->limit febfffff

Setting resources...

PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:50d0 align:12 gran:0 limit:ffff

Assigned: PCI: 00:1e.0 1c *  [0x1000 - 0x4fff] io

Assigned: PCI: 00:1c.3 1c *  [0x5000 - 0x5fff] io

Assigned: PCI: 00:1d.0 20 *  [0x6000 - 0x601f] io

Assigned: PCI: 00:1d.1 20 *  [0x6020 - 0x603f] io

Assigned: PCI: 00:1d.2 20 *  [0x6040 - 0x605f] io

Assigned: PCI: 00:1d.3 20 *  [0x6060 - 0x607f] io

Assigned: PCI: 00:1f.3 20 *  [0x6080 - 0x609f] io

Assigned: PCI: 00:1f.2 20 *  [0x60a0 - 0x60af] io

Assigned: PCI: 00:02.0 14 *  [0x60b0 - 0x60b7] io

Assigned: PCI: 00:1f.2 10 *  [0x60b8 - 0x60bf] io

Assigned: PCI: 00:1f.2 18 *  [0x60c0 - 0x60c7] io

Assigned: PCI: 00:1f.2 14 *  [0x60c8 - 0x60cb] io

Assigned: PCI: 00:1f.2 1c *  [0x60cc - 0x60cf] io

PCI_DOMAIN: 0000 allocate_resources_io: next_base: 60d0 size: 50d0 align: 12 gran: 0 done

PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff

PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done

PCI: 00:1c.3 allocate_resources_io: base:5000 size:1000 align:12 gran:12 limit:ffff

Assigned: PCI: 02:00.0 10 *  [0x5000 - 0x50ff] io

PCI: 00:1c.3 allocate_resources_io: next_base: 5100 size: 1000 align: 12 gran: 12 done

PCI: 00:1e.0 allocate_resources_io: base:1000 size:4000 align:12 gran:12 limit:ffff

Assigned: PCI: 03:03.0 2c *  [0x1000 - 0x1fff] io

Assigned: PCI: 03:03.0 34 *  [0x2000 - 0x2fff] io

Assigned: PCI: 03:03.1 2c *  [0x3000 - 0x3fff] io

Assigned: PCI: 03:03.1 34 *  [0x4000 - 0x4fff] io

PCI: 00:1e.0 allocate_resources_io: next_base: 5000 size: 4000 align: 12 gran: 12 done

PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:18340b00 align:28 gran:0 limit:febfffff

Assigned: PCI: 00:02.0 18 *  [0xe0000000 - 0xefffffff] prefmem

Assigned: PCI: 00:1e.0 20 *  [0xf0000000 - 0xf40fffff] mem

Assigned: PCI: 00:1e.0 24 *  [0xf4100000 - 0xf80fffff] prefmem

Assigned: PCI: 00:1c.3 20 *  [0xf8100000 - 0xf81fffff] mem

Assigned: PCI: 00:02.0 10 *  [0xf8200000 - 0xf827ffff] mem

Assigned: PCI: 00:02.1 10 *  [0xf8280000 - 0xf82fffff] mem

Assigned: PCI: 00:02.0 1c *  [0xf8300000 - 0xf833ffff] mem

Assigned: PCI: 00:1d.7 10 *  [0xf8340000 - 0xf83403ff] mem

Assigned: PCI: 00:1f.2 24 *  [0xf8340400 - 0xf83407ff] mem

Assigned: PCI: 00:1e.2 18 *  [0xf8340800 - 0xf83409ff] mem

Assigned: PCI: 00:1e.2 1c *  [0xf8340a00 - 0xf8340aff] mem

PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f8340b00 size: 18340b00 align: 28 gran: 0 done

PCI: 00:1c.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff

PCI: 00:1c.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done

PCI: 00:1c.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff

PCI: 00:1c.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done

PCI: 00:1c.3 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff

PCI: 00:1c.3 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done

PCI: 00:1c.3 allocate_resources_mem: base:f8100000 size:100000 align:20 gran:20 limit:febfffff

Assigned: PCI: 02:00.0 30 *  [0xf8100000 - 0xf811ffff] mem

Assigned: PCI: 02:00.0 18 *  [0xf8120000 - 0xf8120fff] mem

PCI: 00:1c.3 allocate_resources_mem: next_base: f8121000 size: 100000 align: 20 gran: 20 done

PCI: 00:1e.0 allocate_resources_prefmem: base:f4100000 size:4000000 align:20 gran:20 limit:febfffff

Assigned: PCI: 03:03.0 1c *  [0xf4100000 - 0xf60fffff] prefmem

Assigned: PCI: 03:03.1 1c *  [0xf6100000 - 0xf80fffff] prefmem

PCI: 00:1e.0 allocate_resources_prefmem: next_base: f8100000 size: 4000000 align: 20 gran: 20 done

PCI: 00:1e.0 allocate_resources_mem: base:f0000000 size:4100000 align:20 gran:20 limit:febfffff

Assigned: PCI: 03:03.2 14 *  [0xf0000000 - 0xf0003fff] mem

Assigned: PCI: 03:03.0 24 *  [0xf0004000 - 0xf2003fff] mem

Assigned: PCI: 03:03.1 24 *  [0xf2004000 - 0xf4003fff] mem

Assigned: PCI: 03:03.0 10 *  [0xf4004000 - 0xf4004fff] mem

Assigned: PCI: 03:03.1 10 *  [0xf4005000 - 0xf4005fff] mem

Assigned: PCI: 03:03.2 10 *  [0xf4006000 - 0xf40067ff] mem

PCI: 00:1e.0 allocate_resources_mem: next_base: f4006800 size: 4100000 align: 20 gran: 20 done

Root Device assign_resources, bus 0 link: 0

pci_tolm: 0xe0000000

Base of stolen memory: 0x7f800000

Top of Low Used DRAM: 0x80000000

IGD decoded, subtracting 8M UMA

Available memory: 2088960K (2040M)

Adding UMA memory area

Adding PCIe config bar

PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0

PCI: 00:02.0 10 <- [0x00f8200000 - 0x00f827ffff] size 0x00080000 gran 0x13 mem

PCI: 00:02.0 14 <- [0x00000060b0 - 0x00000060b7] size 0x00000008 gran 0x03 io

PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem

PCI: 00:02.0 1c <- [0x00f8300000 - 0x00f833ffff] size 0x00040000 gran 0x12 mem

PCI: 00:02.1 10 <- [0x00f8280000 - 0x00f82fffff] size 0x00080000 gran 0x13 mem

PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

PCI: 00:1c.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 prefmem

PCI: 00:1c.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 mem

PCI: 00:1c.3 1c <- [0x0000005000 - 0x0000005fff] size 0x00001000 gran 0x0c bus 02 io

PCI: 00:1c.3 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem

PCI: 00:1c.3 20 <- [0x00f8100000 - 0x00f81fffff] size 0x00100000 gran 0x14 bus 02 mem

PCI: 00:1c.3 assign_resources, bus 2 link: 0

PCI: 02:00.0 10 <- [0x0000005000 - 0x00000050ff] size 0x00000100 gran 0x08 io

PCI: 02:00.0 18 <- [0x00f8120000 - 0x00f8120fff] size 0x00001000 gran 0x0c mem64

PCI: 02:00.0 30 <- [0x00f8100000 - 0x00f811ffff] size 0x00020000 gran 0x11 romem

PCI: 00:1c.3 assign_resources, bus 2 link: 0

PCI: 00:1d.0 20 <- [0x0000006000 - 0x000000601f] size 0x00000020 gran 0x05 io

PCI: 00:1d.1 20 <- [0x0000006020 - 0x000000603f] size 0x00000020 gran 0x05 io

PCI: 00:1d.2 20 <- [0x0000006040 - 0x000000605f] size 0x00000020 gran 0x05 io

PCI: 00:1d.3 20 <- [0x0000006060 - 0x000000607f] size 0x00000020 gran 0x05 io

PCI: 00:1d.7 10 <- [0x00f8340000 - 0x00f83403ff] size 0x00000400 gran 0x0a mem

PCI: 00:1e.0 1c <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c bus 03 io

PCI: 00:1e.0 24 <- [0x00f4100000 - 0x00f80fffff] size 0x04000000 gran 0x14 bus 03 prefmem

PCI: 00:1e.0 20 <- [0x00f0000000 - 0x00f40fffff] size 0x04100000 gran 0x14 bus 03 mem

PCI: 00:1e.0 assign_resources, bus 3 link: 0

PCI: 03:03.0 In set resources 

PCI: 03:03.0 10 <- [0x00f4004000 - 0x00f4004fff] size 0x00001000 gran 0x0c mem

PCI: 03:03.0 2c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x02 io

PCI: 03:03.0 34 <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io

PCI: 03:03.0 1c <- [0x00f4100000 - 0x00f60fffff] size 0x02000000 gran 0x0c prefmem

PCI: 03:03.0 24 <- [0x00f0004000 - 0x00f2003fff] size 0x02000000 gran 0x0c mem

PCI: 03:03.0 done set resources 

PCI: 03:03.1 In set resources 

PCI: 03:03.1 10 <- [0x00f4005000 - 0x00f4005fff] size 0x00001000 gran 0x0c mem

PCI: 03:03.1 2c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x02 io

PCI: 03:03.1 34 <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x02 io

PCI: 03:03.1 1c <- [0x00f6100000 - 0x00f80fffff] size 0x02000000 gran 0x0c prefmem

PCI: 03:03.1 24 <- [0x00f2004000 - 0x00f4003fff] size 0x02000000 gran 0x0c mem

PCI: 03:03.1 done set resources 

PCI: 03:03.2 10 <- [0x00f4006000 - 0x00f40067ff] size 0x00000800 gran 0x0b mem

PCI: 03:03.2 14 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e mem

PCI: 00:1e.0 assign_resources, bus 3 link: 0

PCI: 00:1e.2 18 <- [0x00f8340800 - 0x00f83409ff] size 0x00000200 gran 0x09 mem

PCI: 00:1e.2 1c <- [0x00f8340a00 - 0x00f8340aff] size 0x00000100 gran 0x08 mem

PCI: 00:1f.0 assign_resources, bus 0 link: 0

PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io

PNP: 002e.1 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq

ERROR: PNP: 002e.1 74 not allocated

PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io

PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq

PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io

PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq

PCI: 00:1f.0 assign_resources, bus 0 link: 0

PCI: 00:1f.2 10 <- [0x00000060b8 - 0x00000060bf] size 0x00000008 gran 0x03 io

PCI: 00:1f.2 14 <- [0x00000060c8 - 0x00000060cb] size 0x00000004 gran 0x02 io

PCI: 00:1f.2 18 <- [0x00000060c0 - 0x00000060c7] size 0x00000008 gran 0x03 io

PCI: 00:1f.2 1c <- [0x00000060cc - 0x00000060cf] size 0x00000004 gran 0x02 io

PCI: 00:1f.2 20 <- [0x00000060a0 - 0x00000060af] size 0x00000010 gran 0x04 io

PCI: 00:1f.2 24 <- [0x00f8340400 - 0x00f83407ff] size 0x00000400 gran 0x0a mem

PCI: 00:1f.3 20 <- [0x0000006080 - 0x000000609f] size 0x00000020 gran 0x05 io

PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0

Root Device assign_resources, bus 0 link: 0

Done setting resources.

Show resources in subtree (Root Device)...After assigning values.

 Root Device child on link 0 APIC_CLUSTER: 0

  APIC_CLUSTER: 0 child on link 0 APIC: 00

   APIC: 00

  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0

  PCI_DOMAIN: 0000 resource base 1000 size 50d0 align 12 gran 0 limit ffff flags 40040100 index 10000000

  PCI_DOMAIN: 0000 resource base e0000000 size 18340b00 align 28 gran 0 limit febfffff flags 40040200 index 10000100

  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3

  PCI_DOMAIN: 0000 resource base c0000 size 7f740000 align 0 gran 0 limit 0 flags e0004200 index 4

  PCI_DOMAIN: 0000 resource base 7f800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 6

  PCI_DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7

   PCI: 00:00.0

   PCI: 00:02.0

   PCI: 00:02.0 resource base f8200000 size 80000 align 19 gran 19 limit febfffff flags 60000200 index 10

   PCI: 00:02.0 resource base 60b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 14

   PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit febfffff flags 60001200 index 18

   PCI: 00:02.0 resource base f8300000 size 40000 align 18 gran 18 limit febfffff flags 60000200 index 1c

   PCI: 00:02.1

   PCI: 00:02.1 resource base f8280000 size 80000 align 19 gran 19 limit febfffff flags 60000200 index 10

   PCI: 00:1b.0

   PCI: 00:1c.0

   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c

   PCI: 00:1c.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24

   PCI: 00:1c.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20

   PCI: 00:1c.1

   PCI: 00:1c.2

   PCI: 00:1c.3 child on link 0 PCI: 02:00.0

   PCI: 00:1c.3 resource base 5000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c

   PCI: 00:1c.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24

   PCI: 00:1c.3 resource base f8100000 size 100000 align 20 gran 20 limit febfffff flags 60080202 index 20

    PCI: 02:00.0

    PCI: 02:00.0 resource base 5000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10

    PCI: 02:00.0 resource base f8120000 size 1000 align 12 gran 12 limit febfffff flags 60000201 index 18

    PCI: 02:00.0 resource base f8100000 size 20000 align 17 gran 17 limit febfffff flags 60002200 index 30

   PCI: 00:1d.0

   PCI: 00:1d.0 resource base 6000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20

   PCI: 00:1d.1

   PCI: 00:1d.1 resource base 6020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20

   PCI: 00:1d.2

   PCI: 00:1d.2 resource base 6040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20

   PCI: 00:1d.3

   PCI: 00:1d.3 resource base 6060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20

   PCI: 00:1d.7

   PCI: 00:1d.7 resource base f8340000 size 400 align 10 gran 10 limit febfffff flags 60000200 index 10

   PCI: 00:1e.0 child on link 0 PCI: 03:03.0

   PCI: 00:1e.0 resource base 1000 size 4000 align 12 gran 12 limit ffff flags 60080102 index 1c

   PCI: 00:1e.0 resource base f4100000 size 4000000 align 20 gran 20 limit febfffff flags 60081202 index 24

   PCI: 00:1e.0 resource base f0000000 size 4100000 align 20 gran 20 limit febfffff flags 60080202 index 20

    PCI: 03:03.0

    PCI: 03:03.0 resource base f4004000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10

    PCI: 03:03.0 resource base 1000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 2c

    PCI: 03:03.0 resource base 2000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 34

    PCI: 03:03.0 resource base f4100000 size 2000000 align 12 gran 12 limit febfffff flags 60001200 index 1c

    PCI: 03:03.0 resource base f0004000 size 2000000 align 12 gran 12 limit febfffff flags 60000200 index 24

    PCI: 03:03.1

    PCI: 03:03.1 resource base f4005000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10

    PCI: 03:03.1 resource base 3000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 2c

    PCI: 03:03.1 resource base 4000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 34

    PCI: 03:03.1 resource base f6100000 size 2000000 align 12 gran 12 limit febfffff flags 60001200 index 1c

    PCI: 03:03.1 resource base f2004000 size 2000000 align 12 gran 12 limit febfffff flags 60000200 index 24

    PCI: 03:03.2

    PCI: 03:03.2 resource base f4006000 size 800 align 11 gran 11 limit febfffff flags 60000200 index 10

    PCI: 03:03.2 resource base f0000000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 14

    PCI: 03:03.3

   PCI: 00:1e.2

   PCI: 00:1e.2 resource base f8340800 size 200 align 9 gran 9 limit febfffff flags 60000200 index 18

   PCI: 00:1e.2 resource base f8340a00 size 100 align 8 gran 8 limit febfffff flags 60000200 index 1c

   PCI: 00:1f.0 child on link 0 PNP: 002e.1

   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100

   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

    PNP: 002e.1

    PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60

    PNP: 002e.1 resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70

    PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74

    PNP: 002e.2

    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60

    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70

    PNP: 002e.3

    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60

    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70

    PNP: 002e.5

    PNP: 002e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60

    PNP: 002e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62

    PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70

    PNP: 00ff.1

    PNP: 00ff.0

   PCI: 00:1f.2

   PCI: 00:1f.2 resource base 60b8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10

   PCI: 00:1f.2 resource base 60c8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14

   PCI: 00:1f.2 resource base 60c0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18

   PCI: 00:1f.2 resource base 60cc size 4 align 2 gran 2 limit ffff flags 60000100 index 1c

   PCI: 00:1f.2 resource base 60a0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20

   PCI: 00:1f.2 resource base f8340400 size 400 align 10 gran 10 limit febfffff flags 60000200 index 24

   PCI: 00:1f.3

   PCI: 00:1f.3 resource base 6080 size 20 align 5 gran 5 limit ffff flags 60000100 index 20

Done allocating resources.

POST: 0x88

Enabling resources...

PCI: 00:00.0 subsystem <- 4352/6886

PCI: 00:00.0 cmd <- 06

PCI: 00:02.0 cmd <- 03

PCI: 00:02.1 cmd <- 02

PCI: 00:1c.0 bridge ctrl <- 0003

PCI: 00:1c.0 subsystem <- 4352/6886

PCI: 00:1c.0 cmd <- 100

PCI: 00:1c.3 bridge ctrl <- 0003

PCI: 00:1c.3 cmd <- 07

PCI: 00:1d.0 subsystem <- 4352/6886

PCI: 00:1d.0 cmd <- 01

PCI: 00:1d.1 subsystem <- 4352/6886

PCI: 00:1d.1 cmd <- 01

PCI: 00:1d.2 subsystem <- 4352/6886

PCI: 00:1d.2 cmd <- 01

PCI: 00:1d.3 subsystem <- 4352/6886

PCI: 00:1d.3 cmd <- 01

PCI: 00:1d.7 subsystem <- 4352/6886

PCI: 00:1d.7 cmd <- 102

PCI: 00:1e.0 bridge ctrl <- 0003

PCI: 00:1e.0 subsystem <- 4352/6886

PCI: 00:1e.0 cmd <- 107 (NOT WRITTEN!)

PCI: 00:1e.2 cmd <- 02

PCI: 00:1f.0 subsystem <- 4352/6886

PCI: 00:1f.0 cmd <- 107

PCI: 00:1f.2 subsystem <- 4352/6886

PCI: 00:1f.2 cmd <- 03

PCI: 00:1f.3 subsystem <- 4352/6886

PCI: 00:1f.3 cmd <- 101

PCI: 02:00.0 cmd <- 03

PCI: 03:03.0 bridge ctrl <- 0143

PCI: 03:03.0 cmd <- 03

PCI: 03:03.1 bridge ctrl <- 0143

PCI: 03:03.1 cmd <- 03

PCI: 03:03.2 cmd <- 02

done.

Initializing devices...

Root Device init

APIC_CLUSTER: 0 init

start_eip=0x0000c000, offset=0x00100000, code_size=0x0000005b

Initializing SMM handler... ... pmbase = 0x0500



SMI_STS: PM1 

PM1_STS: PWRBTN TMROF 

GPE0_STS: PME 

ALT_GP_SMI_STS: 

TCO_STS: 

  ... raise SMI#

Initializing CPU #0

CPU: vendor Intel device 6fb

CPU: family 06, model 0f, stepping 0b

POST: 0x60

Enabling cache

microcode_info: sig = 0x000006fb pf=0x00000020 rev = 0x00000000

CPU: Intel(R) Core(TM)2 Duo CPU     T5500  @ 1.66GHz.



Setting fixed MTRRs(0-88) Type: UC

Setting fixed MTRRs(0-16) Type: WB

Setting fixed MTRRs(24-88) Type: WB

DONE fixed MTRRs

call enable_fixed_mtrr()

Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 1, base: 1024MB, range:  512MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 2, base: 1536MB, range:  256MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 3, base: 1792MB, range:  128MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 4, base: 1920MB, range:   64MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 5, base: 1984MB, range:   32MB, type WB

ADDRESS_MASK_HIGH=0xf

Running out of variable MTRRs!

Zero-sized MTRR range @0KB

DONE variable MTRRs

Clear out the extra MTRR's

call enable_var_mtrr()

Leave x86_setup_var_mtrrs

POST: 0x6a



MTRR check

Fixed MTRRs   : Enabled

Variable MTRRs: Enabled



POST: 0x93

Setting up local apic... apic_id: 0x00 done.

POST: 0x9b

CPU: 0 2 siblings

CPU: 0 has sibling 1

Asserting INIT.

Waiting for send to finish...

+Deasserting INIT.

Waiting for send to finish...

+#startup loops: 2.

Sending STARTUP #1 to 1.

After apic_write.

Startup point 1.

Waiting for send to finish...

+Sending STARTUP #2 to 1.

After apic_write.

Startup point 1.

Waiting for send to finish...

+After Startup.

CPU #0 initialized

Waiting for 1 CPUS to stop

Initializing CPU #1

CPU: vendor Intel device 6fb

CPU: family 06, model 0f, stepping 0b

POST: 0x60

Enabling cache

microcode_info: sig = 0x000006fb pf=0x00000020 rev = 0x00000000

CPU: Intel(R) Core(TM)2 Duo CPU     T5500  @ 1.66GHz.



Setting fixed MTRRs(0-88) Type: UC

Setting fixed MTRRs(0-16) Type: WB

Setting fixed MTRRs(24-88) Type: WB

DONE fixed MTRRs

call enable_fixed_mtrr()

Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 1, base: 1024MB, range:  512MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 2, base: 1536MB, range:  256MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 3, base: 1792MB, range:  128MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 4, base: 1920MB, range:   64MB, type WB

ADDRESS_MASK_HIGH=0xf

Setting variable MTRR 5, base: 1984MB, range:   32MB, type WB

ADDRESS_MASK_HIGH=0xf

Running out of variable MTRRs!

Zero-sized MTRR range @0KB

DONE variable MTRRs

Clear out the extra MTRR's

call enable_var_mtrr()

Leave x86_setup_var_mtrrs

POST: 0x6a



MTRR check

Fixed MTRRs   : Enabled

Variable MTRRs: Enabled



POST: 0x93

Setting up local apic... apic_id: 0x01 done.

POST: 0x9b

CPU: 1 2 siblings

CPU #1 initialized

CPU 1 going down...

All AP CPUs stopped

PCI: 00:00.0 init

PCI: 00:02.0 init

Check CBFS header at fffeffe0

magic is 4f524243

Found CBFS header at fffeffe0

Check cmos_layout.bin

CBFS: follow chain: fff00000 + 28 + 54f + align -> fff00580

Check pci8086,27ae.rom

In CBFS, ROM address for PCI: 00:02.0 = fff005b8

PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040

PCI ROM image, vendor ID 8086, device ID 27a2,

ID mismatch: vendor ID 8086, device ID 27a2

PCI: 00:02.1 init

PCI: 00:1c.0 init

Initializing ICH7 PCIe bridge.

PCI: 00:1c.3 init

Initializing ICH7 PCIe bridge.

PCI: 00:1d.0 init

UHCI: Setting up controller.. done.

PCI: 00:1d.1 init

UHCI: Setting up controller.. done.

PCI: 00:1d.2 init

UHCI: Setting up controller.. done.

PCI: 00:1d.3 init

UHCI: Setting up controller.. done.

PCI: 00:1d.7 init

EHCI: Setting up controller.. done.

PCI: 00:1e.0 init

PCI: 00:1e.2 init

Initializing AC'97 Audio.

No primary codec. Disabling AC'97 Audio.

PCI: 00:1f.0 init

i82801gx: lpc_init

Southbridge APIC ID = 2

Dumping IOAPIC registers

  reg 0x0000: 0x02000000

  reg 0x0001: 0x00170020

  reg 0x0002: 0x00170020

Set power on after power failure.

NMI sources disabled.

rtc_failed = 0x0

RTC Init

i8259_configure_irq_trigger: current interrupts are 0x0

i8259_configure_irq_trigger: try to set interrupts 0x200

Disabling ACPI via APMC:

done.

Locking SMM.

PCI: 00:1f.2 init

i82801gx_sata: initializing...

SATA controller in combined mode.

PCI: 00:1f.3 init

Initializing SMBus device:

  Old SMBUS Base Address: 0x6081

  New SMBUS Base Address: 0x0401

PCI: 02:00.0 init

Initializing RTL8168 Gigabit Ethernet

PCI: 03:03.0 init

TI PCI7420/7620 init

PCI: 03:03.1 init

TI PCI7420/7620 init

PCI: 03:03.2 init

TI PCI7420/7620 FireWire init

PNP: 002e.1 init

PNP: 002e.2 init

PNP: 002e.3 init

PNP: 00ff.0 init

Renesas M3885x: Initializing keyboard.

Keyboard init...

m3885: get variable 0c = 88

m3885: set variable 0c = 88

m3885: set procram 80 = c1

m3885: set procram 81 = c0

m3885: set procram 82 = d8

m3885: set procram 83 = db

m3885: set procram 84 = bf

m3885: set procram 85 = 05

m3885: set procram 86 = 76

m3885: set procram 87 = bf

m3885: set procram 88 = bf

m3885: set procram 89 = 80

m3885: set procram 8a = 78

m3885: set procram 8b = bf

m3885: set procram 8c = bf

m3885: set procram 8d = 07

m3885: set procram 8e = 88

m3885: set procram 8f = c2

m3885: set procram 90 = 03

m3885: set procram 91 = 09

m3885: set procram 92 = d9

m3885: set procram 93 = 16

m3885: set procram 94 = bf

m3885: set procram 95 = 06

m3885: set procram 96 = 0e

m3885: set procram 97 = 81

m3885: set procram 98 = bf

m3885: set procram 99 = bf

m3885: set procram 9a = ee

m3885: set procram 9b = bf

m3885: set procram 9c = bf

m3885: set procram 9d = 55

m3885: set procram 9e = 9a

m3885: set procram 9f = 89

m3885: set procram a0 = 1e

m3885: set procram a1 = 15

m3885: set procram a2 = 36

m3885: set procram a3 = da

m3885: set procram a4 = e8

m3885: set procram a5 = bf

m3885: set procram a6 = 0d

m3885: set procram a7 = bf

m3885: set procram a8 = bf

m3885: set procram a9 = bf

m3885: set procram aa = bf

m3885: set procram ab = a3

m3885: set procram ac = bf

m3885: set procram ad = 4e

m3885: set procram ae = 66

m3885: set procram af = 8b

m3885: set procram b0 = 1d

m3885: set procram b1 = 2e

m3885: set procram b2 = e6

m3885: set procram b3 = e7

m3885: set procram b4 = e5

m3885: set procram b5 = 1c

m3885: set procram b6 = 58

m3885: set procram b7 = bf

m3885: set procram b8 = 82

m3885: set procram b9 = bf

m3885: set procram ba = f0

m3885: set procram bb = bf

m3885: set procram bc = bf

m3885: set procram bd = 5b

m3885: set procram be = 5d

m3885: set procram bf = 8c

m3885: set procram c0 = 22

m3885: set procram c1 = 25

m3885: set procram c2 = 2c

m3885: set procram c3 = 35

m3885: set procram c4 = e1

m3885: set procram c5 = 1a

m3885: set procram c6 = 96

m3885: set procram c7 = bf

m3885: set procram c8 = bf

m3885: set procram c9 = bf

m3885: set procram ca = ec

m3885: set procram cb = bf

m3885: set procram cc = bf

m3885: set procram cd = 54

m3885: set procram ce = f1

m3885: set procram cf = 8f

m3885: set procram d0 = 1b

m3885: set procram d1 = 2a

m3885: set procram d2 = 2b

m3885: set procram d3 = 32

m3885: set procram d4 = e9

m3885: set procram d5 = 31

m3885: set procram d6 = 29

m3885: set procram d7 = 61

m3885: set procram d8 = bf

m3885: set procram d9 = bf

m3885: set procram da = 8d

m3885: set procram db = bf

m3885: set procram dc = 86

m3885: set procram dd = c3

m3885: set procram de = 92

m3885: set procram df = 93

m3885: set procram e0 = 21

m3885: set procram e1 = 23

m3885: set procram e2 = 34

m3885: set procram e3 = 33

m3885: set procram e4 = 41

m3885: set procram e5 = e0

m3885: set procram e6 = bf

m3885: set procram e7 = bf

m3885: set procram e8 = bf

m3885: set procram e9 = 85

m3885: set procram ea = eb

m3885: set procram eb = bf

m3885: set procram ec = b6

m3885: set procram ed = bf

m3885: set procram ee = 91

m3885: set procram ef = bf

m3885: set procram f0 = 26

m3885: set procram f1 = 24

m3885: set procram f2 = 2d

m3885: set procram f3 = e3

m3885: set procram f4 = e2

m3885: set procram f5 = e4

m3885: set procram f6 = bf

m3885: set procram f7 = bf

m3885: set procram f8 = 87

m3885: set procram f9 = bf

m3885: set procram fa = ea

m3885: set procram fb = bf

m3885: set procram fc = bf

m3885: set procram fd = 52

m3885: set procram fe = 90

m3885: set procram ff = 8e

m3885: set variable 0c = a8

m3885: get variable 00 = 47

M388x has 71 variables in bank 2.

m3885: get variable 23 = 80

Writing Fn-Table to M388x RAM offset 0x80

m3885: set procram 80 = 04

m3885: set procram 81 = bd

m3885: set procram 82 = 0c

m3885: set procram 83 = be

m3885: set procram 84 = 7e

m3885: set procram 85 = 9a

m3885: set procram 86 = 8a

m3885: set procram 87 = b6

m3885: set procram 88 = 92

m3885: set procram 89 = 8f

m3885: set procram 8a = 93

m3885: set procram 8b = 8e

m3885: set procram 8c = 81

m3885: set procram 8d = 86

m3885: set procram 8e = 82

m3885: set procram 8f = 87

m3885: set procram 90 = 8a

m3885: set procram 91 = 9a

m3885: set procram 92 = 8d

m3885: set procram 93 = 7e

m3885: set procram 94 = 88

m3885: set procram 95 = 84

m3885: set procram 96 = 7e

m3885: set procram 97 = 78

m3885: set procram 98 = 77

m3885: set procram 99 = 07

m3885: set procram 9a = 77

m3885: set procram 9b = 98

m3885: set procram 9c = 89

m3885: set procram 9d = b2

m3885: set procram 9e = 05

m3885: set procram 9f = 9b

m3885: set procram a0 = 78

m3885: set procram a1 = 84

m3885: set procram a2 = 07

m3885: set procram a3 = 88

m3885: set procram a4 = 8a

m3885: set procram a5 = 7e

m3885: set procram a6 = 05

m3885: set procram a7 = a6

m3885: set procram a8 = 06

m3885: set procram a9 = a7

m3885: set procram aa = 04

m3885: set procram ab = a8

m3885: set procram ac = 0c

m3885: set procram ad = a9

m3885: set procram ae = 03

m3885: set procram af = aa

m3885: set procram b0 = 0b

m3885: set procram b1 = c1

m3885: set procram b2 = 83

m3885: set procram b3 = c0

m3885: set procram b4 = 0a

m3885: set procram b5 = ad

m3885: set procram b6 = 01

m3885: set procram b7 = ae

m3885: set procram b8 = 09

m3885: set procram b9 = af

m3885: set procram ba = 78

m3885: set procram bb = b0

m3885: set procram bc = 07

m3885: set procram bd = b1

m3885: set procram be = 1a

m3885: set procram bf = 61

m3885: set procram c0 = 3b

m3885: set procram c1 = 69

m3885: set procram c2 = 42

m3885: set procram c3 = 72

m3885: set procram c4 = 4b

m3885: set procram c5 = 7a

m3885: set procram c6 = 3c

m3885: set procram c7 = 6b

m3885: set procram c8 = 43

m3885: set procram c9 = 73

m3885: set procram ca = 44

m3885: set procram cb = 74

m3885: set procram cc = 3d

m3885: set procram cd = 6c

m3885: set procram ce = 3e

m3885: set procram cf = 75

m3885: set procram d0 = 46

m3885: set procram d1 = 7d

m3885: set procram d2 = 3a

m3885: set procram d3 = 70

m3885: set procram d4 = 49

m3885: set procram d5 = 71

m3885: set procram d6 = 4a

m3885: set procram d7 = 94

m3885: set procram d8 = 4c

m3885: set procram d9 = 79

m3885: set procram da = 4c

m3885: set procram db = 7c

m3885: set procram dc = 45

m3885: set procram dd = 7c

m3885: set procram de = 45

m3885: set procram df = 79

m3885: set procram e0 = 4d

m3885: set procram e1 = 7b

m3885: set procram e2 = 5a

m3885: set procram e3 = 95

m3885: set procram e4 = 4c

m3885: set procram e5 = 7b

m3885: set procram e6 = 45

m3885: set procram e7 = 7b

m3885: set procram e8 = 4d

m3885: set procram e9 = 79

m3885: set procram ea = 4d

m3885: set procram eb = 7c

m3885: set procram ec = 4e

m3885: set procram ed = 7b

m3885: set procram ee = 54

m3885: set procram ef = 95

m3885: set procram f0 = 52

m3885: set procram f1 = 7c

m3885: set procram f2 = 45

m3885: set procram f3 = 94

m3885: set procram f4 = 4a

m3885: set procram f5 = 79

m3885: set procram f6 = b3

m3885: set procram f7 = 95

m3885: set procram f8 = b4

m3885: set procram f9 = 7b

m3885: set procram fa = b5

m3885: set procram fb = 7c

m3885: set procram fc = 00

m3885: set procram fd = 00

m3885: set procram fe = 55

m3885: set procram ff = 79

m3885: set variable 0c = 88

m3885: get variable 00 = 47

M388x has 71 variables in original bank.

m3885: get variable 08 = 20

m3885: set variable 08 = 6c

m3885: get variable 0a = 00

m3885: set variable 0a = 00

m3885: get variable 0c = 88

m3885: set variable 0c = 08

m3885: get variable 11 = 40

m3885: set variable 11 = 06

m3885: get variable 13 = 00

m3885: set variable 13 = 00

m3885: get variable 14 = 00

m3885: set variable 14 = 00

m3885: get variable 15 = 00

m3885: set variable 15 = 3f

m3885: get variable 16 = 00

m3885: set variable 16 = 00

m3885: get variable 17 = 00

m3885: set variable 17 = 00

m3885: get variable 18 = 46

m3885: set variable 18 = 0e

m3885: get variable 19 = 00

m3885: set variable 19 = 9f

m3885: get variable 1a = 00

m3885: set variable 1a = 9f

m3885: get variable 1b = 00

m3885: set variable 1b = 6a

m3885: get variable 1c = 00

m3885: set variable 1c = 9f

m3885: get variable 1d = 00

m3885: set variable 1d = 9f

m3885: get variable 1e = 9f

m3885: set variable 1e = 87

m3885: get variable 1f = 00

m3885: set variable 1f = 9f

m3885: get variable 20 = 29

m3885: set variable 20 = 9f

m3885: get variable 21 = 01

m3885: set variable 21 = 08

m3885: get variable 24 = 02

m3885: set variable 24 = 30

m3885: get variable 2b = 00

m3885: set variable 2b = 00

m3885: get variable 2c = 00

m3885: set variable 2c = 80

m3885: get variable 2d = 00

m3885: set variable 2d = 02

m3885: get variable 2e = 00

m3885: set variable 2e = 00

m3885: get variable 2f = 80

m3885: set variable 2f = 00

m3885: set variable 0c = 98

m3885: set procram ff = c1

m3885: set procram 6d = 81

m3885: set procram 6c = 80

m3885: set procram f2 = 02

m3885: set procram f3 = 5d

m3885: set procram f9 = 0a

m3885: get variable 0c = 98

m3885: set variable 0c = c8

m3885: get procram f8 = ea

m3885: set procram d0 = 9a

m3885: get variable 0c = c8

m3885: set variable 0c = c8

m3885: get procram f8 = ea

m3885: set procram d2 = 9a

m3885: get variable 0c = c8

m3885: set variable 0c = c8

m3885: get procram f8 = ea

m3885: set procram d3 = 8a

m3885: set procram d1 = 88

m3885: set procram d6 = 88

m3885: set procram d7 = 88

m3885: set procram d4 = 98

m3885: set procram d5 = 98

m3885: set procram da = 80

m3885: set procram db = 80

m3885: set procram dd = 80

m3885: set procram de = 80

m3885: set procram df = 80

m3885: set procram d8 = 81

m3885: set procram d9 = 81

m3885: set procram dc = 81

m3885: set variable 0c = d8

m3885: set procram 81 = 9c

m3885: set procram 82 = 01

m3885: set procram 84 = 50

m3885: set procram 85 = 55

m3885: set procram 86 = 81

m3885: set procram 87 = 78

m3885: set procram 89 = 9c

m3885: set procram 8a = 01

m3885: set procram 8c = 4b

m3885: set procram 8d = 50

m3885: set procram 8e = 81

Devices initialized

Show all devs...After init.

Root Device: enabled 1

APIC_CLUSTER: 0: enabled 1

APIC: 00: enabled 1

PCI_DOMAIN: 0000: enabled 1

PCI: 00:00.0: enabled 1

PCI: 00:1b.0: enabled 0

PCI: 00:1c.0: enabled 1

PCI: 00:1c.1: enabled 0

PCI: 00:1c.2: enabled 0

PCI: 00:1d.0: enabled 1

PCI: 00:1d.1: enabled 1

PCI: 00:1d.2: enabled 1

PCI: 00:1d.3: enabled 1

PCI: 00:1d.7: enabled 1

PCI: 00:1e.0: enabled 1

PCI: 03:03.0: enabled 1

PCI: 03:03.1: enabled 1

PCI: 03:03.2: enabled 1

PCI: 03:03.3: enabled 0

PCI: 00:1f.0: enabled 1

PNP: 002e.1: enabled 1

PNP: 002e.2: enabled 1

PNP: 002e.3: enabled 1

PNP: 002e.5: enabled 0

PNP: 00ff.1: enabled 1

PCI: 00:1f.2: enabled 1

PCI: 00:1f.3: enabled 1

PCI: 00:02.0: enabled 1

PCI: 00:02.1: enabled 1

PCI: 00:1c.3: enabled 1

PCI: 00:1e.2: enabled 1

PCI: 02:00.0: enabled 1

PNP: 00ff.0: enabled 1

APIC: 01: enabled 1

POST: 0x89

Initializing CBMEM area to 0x7f6f0000 (1114112 bytes)

Adding CBMEM entry as no. 1

Moving GDT to 7f6f0200...ok

POST: 0x8a

High Tables Base is 7f6f0000.

POST: 0x9a

Copying Interrupt Routing Table to 0x000f0000... done.

Adding CBMEM entry as no. 2

Copying Interrupt Routing Table to 0x7f6f0400... done.

PIRQ table: 320 bytes.

POST: 0x9b

Wrote the mp table end at: 000f0410 - 000f059c

Adding CBMEM entry as no. 3

Wrote the mp table end at: 7f6f1410 - 7f6f159c

MP table: 412 bytes.

POST: 0x9c

Adding CBMEM entry as no. 4

ACPI: Writing ACPI tables at 7f6f2400.

ACPI:    * HPET

ACPI: added table 1/32, length now 40

ACPI:    * MADT

ACPI: added table 2/32, length now 44

ACPI:    * MCFG

ACPI: added table 3/32, length now 48

ACPI:     * FACS

ACPI: Patching up global NVS in DSDT at offset 0x020d -> 0x7f6f5f10

ACPI:     * DSDT @ 7f6f2730 Length 37d9

ACPI:     * FADT

ACPI: added table 4/32, length now 52

ACPI:     * SSDT

Found 1 CPU(s) with 2 core(s) each.

clocks between 996 and 1660 MHz.

adding 3 P-States between busratio 6 and a, incl. P0

clocks between 996 and 1660 MHz.

adding 3 P-States between busratio 6 and a, incl. P0

ACPI: added table 5/32, length now 56

current = 7f6f6300

ACPI:     * DMI (Linux workaround)

ACPI: done.

Laptop handling...

ACPI tables: 16224 bytes.

POST: 0x9d

Adding CBMEM entry as no. 5

Writing high table forward entry at 0x00000500

Wrote coreboot table at: 00000500 - 00000518  checksum a06e

New low_table_end: 0x00000518

Now going to write high coreboot table at 0x7f6fe000

rom_table_end = 0x7f6fe000

Adjust low_table_end from 0x00000518 to 0x00001000 

Adjust rom_table_end from 0x7f6fe000 to 0x7f700000 

Adding high table area

coreboot memory table:

 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1. 0000000000001000-000000000009ffff: RAM

 2. 00000000000c0000-000000007f6effff: RAM

 3. 000000007f6f0000-000000007f7fffff: CONFIGURATION TABLES

 4. 000000007f800000-000000007fffffff: RESERVED

 5. 00000000f0000000-00000000f3ffffff: RESERVED

Wrote coreboot table at: 7f6fe000 - 7f6fe1bc  checksum c4ba

coreboot table: 444 bytes.

POST: 0x9e

Adding CBMEM entry as no. 6

 0. FREE SPACE 7f800000 00000000

 1. GDT        7f6f0200 00000200

 2. IRQ TABLE  7f6f0400 00001000

 3. SMP TABLE  7f6f1400 00001000

 4. ACPI       7f6f2400 0000bc00

 5. COREBOOT   7f6fe000 00002000

 6. ACPI RESUME7f700000 00100000

Check CBFS header at fffeffe0

magic is 4f524243

Found CBFS header at fffeffe0

Check cmos_layout.bin

CBFS: follow chain: fff00000 + 28 + 54f + align -> fff00580

Check pci8086,27ae.rom

CBFS: follow chain: fff00580 + 38 + 10000 + align -> fff105c0

Check fallback/coreboot_ram

CBFS: follow chain: fff105c0 + 38 + 1a33b + align -> fff2a940

Check fallback/payload

Got a payload

Loading segment from rom address 0xfff2a978

  data (compression=0)

  New segment dstaddr 0xec400 memsize 0x13c00 srcaddr 0xfff2a9b0 filesize 0x13c00

  (cleaned up) New segment addr 0xec400 size 0x13c00 offset 0xfff2a9b0 filesize 0x13c00

Loading segment from rom address 0xfff2a994

  Entry Point 0x000fdf82

Loading Segment: addr: 0x00000000000ec400 memsz: 0x0000000000013c00 filesz: 0x0000000000013c00

lb: [0x0000000000100000, 0x0000000000164000)

Post relocation: addr: 0x00000000000ec400 memsz: 0x0000000000013c00 filesz: 0x0000000000013c00

it's not compressed!

[ 0x000ec400, 00100000, 0x00100000) <- fff2a9b0

dest 000ec400, end 00100000, bouncebuffer 7f628000

Loaded segments

ICH7 watchdog disabled

Jumping to boot code at fdf82

POST: 0xfe

entry    = 0x000fdf82

lb_start = 0x00100000

lb_size  = 0x00064000

adjust   = 0x7f58c000

buffer   = 0x7f628000

     elf_boot_notes = 0x0012c2d0

adjusted_boot_notes = 0x7f6b82d0

Start bios (version 0.6.0-20100326_214650-morn.localdomain)

Found mainboard Roda RK886EX

Found CBFS header at 0xfffeffe0

Ram Size=0x7f6f0000 (0x0000000000000000 high)

CPU Mhz=1668

Found 2 cpu(s) max supported 2 cpu(s)

Copying PIR from 0x7f6f0400 to 0x000f7a70

Copying MPTABLE from 0x7f6f1400/7f6f1410 to 0x000f78d0

Copying ACPI RSDP from 0x7f6f2400 to 0x000f78a0

SMBIOS ptr=0x000f7880 table=0x7f6efec0

Scan for VGA option rom

Running option rom at c000:0003

Turning on vga console

Starting SeaBIOS (version 0.6.0-20100326_214650-morn.localdomain)



No support for 64bit EHCI

UHCI init on dev 00:1d.0 (io=6000)

UHCI init on dev 00:1d.1 (io=6020)

UHCI init on dev 00:1d.2 (io=6040)

UHCI init on dev 00:1d.3 (io=6060)

Found 0 lpt ports

Found 2 serial ports

ATA controller 0 at 1f0/3f4/0 (irq 14 dev fa)

ATA controller 1 at 170/374/0 (irq 15 dev fa)

ata0-0: TOSHIBA MK3265GSX ATA-8 Hard-Disk (298 GiBytes)

drive 0x000f7800: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=625142448

ata1-0: Optiarc DVD RW AD-7580A ATAPI-7 CD-Rom/DVD-Rom

PS2 keyboard initialized

Scan for option roms

Press F12 for boot menu.



Returned 61440 bytes of ZoneHigh

e820 map has 6 items:

  0: 0000000000000000 - 000000000009f400 = 1

  1: 000000000009f400 - 00000000000a0000 = 2

  2: 00000000000f0000 - 0000000000100000 = 2

  3: 0000000000100000 - 000000007f6ef000 = 1

  4: 000000007f6ef000 - 0000000080000000 = 2

  5: 00000000f0000000 - 00000000f4000000 = 2

enter handle_19:

  NULL

Booting from Floppy...

Boot failed: could not read the boot disk



enter handle_18:

  NULL

Booting from CD-Rom...

Device reports MEDIUM NOT PRESENT

atapi_is_ready returned -1

Boot failed: Could not read from CDROM (code 0003)

enter handle_18:

  NULL

Booting from Hard Disk...

Booting from 0000:7c00



More information about the coreboot mailing list