[coreboot] [commit] r6417 - in trunk/payloads/libpayload/include: . pci
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Tue Mar 1 08:26:01 CET 2011
Author: oxygene
Date: Tue Mar 1 08:26:00 2011
New Revision: 6417
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6417
Log:
libpayload: Add more libpci-compatibility (#defines)
Signed-off-by: Patrick Georgi <patrick.georgi at secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
Modified:
trunk/payloads/libpayload/include/pci.h
trunk/payloads/libpayload/include/pci/pci.h
Modified: trunk/payloads/libpayload/include/pci.h
==============================================================================
--- trunk/payloads/libpayload/include/pci.h Tue Mar 1 08:24:53 2011 (r6416)
+++ trunk/payloads/libpayload/include/pci.h Tue Mar 1 08:26:00 2011 (r6417)
@@ -42,6 +42,8 @@
#define REG_SUBSYS_VENDOR_ID 0x2C
#define REG_SUBSYS_ID 0x2E
+#define REG_COMMAND_IO (1 << 0)
+#define REG_COMMAND_MEM (1 << 1)
#define REG_COMMAND_BM (1 << 2)
#define HEADER_TYPE_NORMAL 0
Modified: trunk/payloads/libpayload/include/pci/pci.h
==============================================================================
--- trunk/payloads/libpayload/include/pci/pci.h Tue Mar 1 08:24:53 2011 (r6416)
+++ trunk/payloads/libpayload/include/pci/pci.h Tue Mar 1 08:26:00 2011 (r6417)
@@ -39,6 +39,32 @@
#define PCI_SUBSYSTEM_VENDOR_ID REG_SUBSYS_VENDOR_ID
#define PCI_SUBSYSTEM_ID REG_SUBSYS_ID
+#define PCI_COMMAND REG_COMMAND
+#define PCI_COMMAND_IO REG_COMMAND_IO
+#define PCI_COMMAND_MEMORY REG_COMMAND_MEM
+#define PCI_COMMAND_MASTER REG_COMMAND_BM
+
+#define PCI_HEADER_TYPE REG_HEADER_TYPE
+#define PCI_HEADER_TYPE_NORMAL HEADER_TYPE_NORMAL
+#define PCI_HEADER_TYPE_BRIDGE HEADER_TYPE_BRIDGE
+#define PCI_HEADER_TYPE_CARDBUS HEADER_TYPE_CARDBUS
+
+#define PCI_BASE_ADDRESS_0 0x10
+#define PCI_BASE_ADDRESS_1 0x14
+#define PCI_BASE_ADDRESS_2 0x18
+#define PCI_BASE_ADDRESS_3 0x1c
+#define PCI_BASE_ADDRESS_4 0x20
+#define PCI_BASE_ADDRESS_5 0x24
+#define PCI_BASE_ADDRESS_SPACE 1 // mask
+#define PCI_BASE_ADDRESS_SPACE_IO 1
+#define PCI_BASE_ADDRESS_SPACE_MEM 0
+#define PCI_BASE_ADDRESS_IO_MASK ~0xf
+#define PCI_BASE_ADDRESS_MEM_MASK ~0x3
+
+#define PCI_ROM_ADDRESS 0x30
+#define PCI_ROM_ADDRESS1 0x38 // on bridges
+#define PCI_ROM_ADDRESS_MASK ~0x7ff
+
struct pci_dev {
u16 domain;
u8 bus, dev, func;
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