[coreboot] [PATCH] asrock e350m1: configure sb800 gpp ports to support onboard pcie nic

[Marc Jones]

Hi Scott,

On Fri, Jun 17, 2011 at 10:26 PM, Scott Duplichan <scott at notabs.org> wrote:
> The attached patch allows the asrock e350m1 onboard nic to work.
> 1) Update the asrock e350m1 devicetree.cb to match the hardware.
> 2) Change the way the sb800 cimx wrapper code works. The original
> cimx code calls sb800 cimx function sbBeforePciInit() once. When
> ported to coreboot, the gpp component of this function was called
> once for each gpp port, as the gpp port's enable/disable state
> became known. A 05/15/2011 change makes the early gpp code run
> only once, triggered by processing the 4th gpp port. This method
> is not general enough because the 4th gpp port is not enabled on
> all boards. With the current change, the early gpp code runs when
> the first gpp port is processed. If any gpp ports are enabled, the
> first must be enabled. Tested with Win7 and linux on asrock e350m1.
> This change will also affect amd inagua, and has not been tested
> on that board.
>
> Signed-off-by: Scott Duplichan <scott at notabs.org>

-		sb_config->PORTCONFIG[0].PortCfg.PortPresent = dev->enabled;
-		return;
-	case (0x15 << 3) | 1: /* 0:15:1 PCIe PortB */
-		sb_config->PORTCONFIG[1].PortCfg.PortPresent = dev->enabled;
-		return;
-	case (0x15 << 3) | 2: /* 0:15:2 PCIe PortC */
-		sb_config->PORTCONFIG[2].PortCfg.PortPresent = dev->enabled;
-		return;
-	case (0x15 << 3) | 3: /* 0:15:3 PCIe PortD */
-		sb_config->PORTCONFIG[3].PortCfg.PortPresent = dev->enabled;
+		{
+		device_t device;
+		for (device = dev; device; device = device->next) {
+			if (dev->path.type != DEVICE_PATH_PCI) continue;
+			if ((device->path.pci.devfn & ~7) != PCI_DEVFN(0x15,0)) break;
+			sb_config->PORTCONFIG[device->path.pci.devfn &
3].PortCfg.PortPresent = device->enabled;
+		}

The allocator is going to loop through and call this function for each
device in the devicetree.cb. Is there a reason to change this to a
loop here? It looks like the real fix is moving the SB_BEFORE_PCI_INIT
call to the last device, and to not run for each device. Did I miss
something more subtle in this patch?

Marc




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