[coreboot] System management mode for Intel processors
hagigatali at gmail.com
Sun Jun 19 11:42:01 CEST 2011
I wonder if anybody can explain the system management mode RAM
addresses for Intel Pentium III/815/ICH2.
I know that SMBASE is 30000 after reset. But 815 can define TSEG (and
HSEG ) and also AB segments some where else. Like TSEG can be 512k or
1M from the top of memory.
Considering that SMBASE can not be any thing but 30000 as the Intel
manual is saying , from what addresses CPU instructions are fetched
after SMI# interrupt at last?
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