[coreboot] Questions about coreboot on X86
Marc Jones
marcj303 at gmail.com
Tue Jun 14 17:44:24 CEST 2011
Hi Hamo,
On Tue, Jun 14, 2011 at 8:44 AM, Hamo <hamo.by at gmail.com> wrote:
> Dear lists,
> I have been studying the boot process of coreboot more deeply, and
> following questions came out:
> 1. Which code clean the bss and set sp pointer to the stack? Since
> those addresses are defined in coreboot_ram.ld, Should it be in
> ramstage? If so, where are they? I don't find them. If not, where are
> they and how do they know the addresses of bss and stack?
/* bss does not contain data, it is just a space that should be zero
* initialized on startup. (typically uninitialized global variables)
* crt0.S fills between _bss and _ebss with zeroes.
*/
As the comment says, it is handled by the ramstage crt0.S code. The
stack is the same that is used by romstage until it is changed by
ramstage.
> 2. What's the propose of romstage? Some init in romstage has been done
> in bootblock, and why those init are done twice?
What do you see done twice? There should be a minimal overlap. Some
things need to be setup for romstage to run.
Marc
--
http://se-eng.com
More information about the coreboot
mailing list