[coreboot] [commit] r6627 - trunk/src/mainboard/asrock/e350m1

Stefan Reinauer stefan.reinauer at coreboot.org
Sat Jun 4 18:23:32 CEST 2011


* Peter Stuge <peter at stuge.se> [110604 18:19]:
> Stefan Reinauer wrote:
> > > +++ trunk/src/mainboard/asrock/e350m1/romstage.c	Sat Jun  4 17:45:12 2011	(r6627)
> > > @@ -50,6 +50,13 @@
> > >    // all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
> > >    __writemsr (0xc0010062, 0);
> > >  
> > > +  // early enable of PrefetchEnSPIFromHost
> > > +  if (boot_cpu())
> > > +    {
> > > +    __outdword (0xcf8, 0x8000a3b8);
> > > +    __outdword (0xcfc, __indword (0xcfc) | 1 << 24);
> > > +    }
> > 
> > This should use pci config space access functions. Also, enabling
> > Prefetch and 33MHz fast read mode should possibly go in the
> > southbridge's bootblock.c so the first cbfs scan does not run with
> > the slow settings.
> 
> Good idea! Please do it! Remember to also revert the commit for
> persimmon.
> 

Unfortunately I have no hardware to test this.

> I think the Fusion code is a good place for such cleanups, where we
> have a chance to factor out more common code before it gets too wide
> spread. :)

Yes. Absolutely




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