[coreboot] [commit] r6626 - trunk/src/mainboard/asrock/e350m1

Stefan Reinauer stefan.reinauer at coreboot.org
Sat Jun 4 18:13:03 CEST 2011


* repository service <svn at coreboot.org> [110604 17:44]:
> Author: stuge
> Date: Sat Jun  4 17:44:54 2011
> New Revision: 6626
> URL: https://tracker.coreboot.org/trac/coreboot/changeset/6626
> 
> Log:
> Port persimmon r6583 to e350m1: pstate 0 early
> 
> Switch processor cores to pstate 0 early to reduce boot time.
> 
> Signed-off-by: Marshall Buschman <mbuschman at lucidmachines.com>
> Acked-by: Peter Stuge <peter at stuge.se>
> 
> Modified:
>    trunk/src/mainboard/asrock/e350m1/romstage.c
> 
> Modified: trunk/src/mainboard/asrock/e350m1/romstage.c
> ==============================================================================
> --- trunk/src/mainboard/asrock/e350m1/romstage.c	Sat Jun  4 17:44:31 2011	(r6625)
> +++ trunk/src/mainboard/asrock/e350m1/romstage.c	Sat Jun  4 17:44:54 2011	(r6626)
> @@ -47,6 +47,9 @@
>    u32 val;
>    u8 reg8;
>  
> +  // all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
> +  __writemsr (0xc0010062, 0);
> +

why not use writemsr instead of __writemsr?


>    // early enable of SPI 33 MHz fast mode read
>    if (boot_cpu())
>      {
> 
> -- 
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
> 




More information about the coreboot mailing list