[coreboot] ASRock e350m1: network problems

[perh52 at runbox.com]

> Start by comparing interrupt setup and interrupt rates with factory BIOS.
>
> Then drill all the way down through the five-six groups of registers
> that are relevant for interrupt handling in the hardware and compare
> differences selectively based on ideas gathered from initial behavior
> comparison. Write patch. Receive thanks! :)
>
>
>//Peter

Indeed. I was hoping someone else might have tried already ;).

OK, it may/may not be related, but the first problem I see is that AHCI
is on irq 41 instead of irq 19. In the SB800 docs (RPR section 8.13) I see
that the SATA controller does not support MSI (or D3 Power State) and these
_must_ be disabled by setting the pci config 0x34 (SB_SATA_REG34) to 0x70
but it wrongly equals 0x60.

The call to set it is actually there in SATA.c/sataInitAfterPciEnum
so it looks like that was not actually called:

  // Disabled SATA MSI and D3 Power State capability
  // RPR 8.13 SATA MSI and D3 Power State Capability
  RWPCI (((SATA_BUS_DEV_FUN << 16) + SB_SATA_REG34), AccWidthUint8 | S3_SAVE, 0, 0x70);

Routines that would call it:

late.c/sata_enable_resources
SBMAIN.c/sbAfterPciInit
SBMAIN.c/sbAfterPciRestoreInit

Comparing sb900 and sb800 code it appears that the call in late.c has been
replaced in sb900 by a call from cpu_bus_init to sb_After_Pci_Init, one of several
new routines in early.c.

northbridge.c/cpu_bus_init
-> early.c/sb_After_Pci_Init
-> sbMain.c/sbAfterPciInit
-> sataInitAfterPciEnum

Can someone comment? Perhaps this is needed in sb800 too?