[coreboot] Patch merged into master: 89461d8 port_enable and port_reset must change atomically.

gerrit at coreboot.org gerrit at coreboot.org
Sun Jul 17 10:22:24 CEST 2011


the following patch was just integrated into master:
commit 89461d88a0e163ab5fee96908a4195035fe800f5
Author: Steven A. Falco <sfalco at coincident.com>
Date:   Fri Jul 15 21:44:35 2011 -0400

    port_enable and port_reset must change atomically.
    
    I have observed two separate EHCI host bridges that do not tolerate
    using C bit-fields to directly manipulate the portsc_t register.  The
    reason for this is that the EHCI spec says that port_enable must go
    to 0 at the time that port_reset goes to 1.  Naturally this cannot be
    done using direct bit-field manipulation.  Instead, we use a temporary
    variable, change the bit-fields there, then atomically write the new
    value back to the hardware.
    
    Signed-off-by: Steven A. Falco <sfalco at coincident.com>
    Change-Id: If138faee43e0293efa203b86f7893fdf1e811269

See http://review.coreboot.org/101 for details.

-gerrit




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