[coreboot] SPI clock rate

Peter Stuge peter at stuge.se
Tue Jul 5 02:25:56 CEST 2011


Andreas Galauner wrote:
> I had the idea of developing a small Board which contains a USB port
> and an SPI flash.

Sure. Or just follow Tom's tip and wire a second SPI bus master
directly onto the mainboard.


> I first thought about emulating the SPI flash completely by an AVR,

What do you mean by AVR? It's relevant for much of what you write.

SPI flash must respond with data immediately after the last address
bit is received. It's really inconvenient to emulate this.


> new approach is a SPI flash which resides on the AVR board

Sure. But simpler to just connect directly to the SPI on the
mainboard.


> If I want to test a new BIOS, the AVR puts the motherboard into reset,
> detaches the flash chip with a multiplexer from the motherboard,
> programs it, switches it back to the motherboard and let off the reset.

Make that:

Hold reset
Program flash chip on mainboard
Release reset


> As an added bonus, I'm thinking about using a USB 2.0 port of an
> USB-capable AVR as a USB debug interface

Note that the Debug Class Device must be able to handle high speed
communication ("USB 2.0" is orthogonal to "high speed") and it must
be able to handle some out-of-spec transfers. It's not at all certain
that your controller does this.


> As I am currently looking for suitable parts, I need to know some
> basic parameters of the SPI communication.
> Does anybody of you know what the typical clock rates between the
> chipset and the flash are?

Any SPI bus master works, the SPI flashes are generally modern enough
to not have a problem with very slow clocks.

Since you seem interested in doing development for SPI flashing over
USB, you may want to look at the preliminary USB protocol document
that me and Stefan Tauner have been working on. Unfortunately it's
been idle for a while, but it's nearly complete. The missing parts
are the things that can vary between flash chips; erase command
sequence and write command sequence. They need to be expressed in
some nice way in the protocol. The intended development hardware is
the Olimex LPC-P1343 board with an NXP LPC1343 Cortex-M3. Once
software works, and once they become available, I want to put a
LPC11U00 on a flexpcb cheap enough to be soldered permanently onto
mainboards. (NXP promise <$1 for "quantity", probably 1k.)


//Peter




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