[coreboot] Jetw. J8F9 support

[Cristian Craciunescu]

I'm sure the problem is coming from PIRQ map; needs some fine tuning. The
board has four serials and all of them are connected the 81216DG super IO
chip so I'm using the first serial port, the onchip uarts are disabled.
There is an additional hwmon chip(f71858) which I did not touched
yet. Attached the patch with j8 dir in mainboard and f81216DG superio added.




Regards,
Cristian
On Tue, Jan 18, 2011 at 10:01 AM, Cristian Craciunescu
<ccristian at gmail.com>wrote:

> Cristian Craciunescu wrote:
> > I've compiled suport for j8f9 board from jetw. using as template other LX
> > mainboard. The system is booting with coreboot/seabios however the serial
> > does not seam to work in kernel. GRUB bootloader works ok over serial but
> as
> > soon as the linux kernel finish booting it does not respond over serial
> but
> > it can send messages to serial. Although the IRQs are detected correctly
> > when the serial has input I can not see any irq messages incrementing in
> > /proc/interrupts. Any hint?
>
> Something is wrong with the interrupt setup in coreboot if they are
> not being delivered to the kernel.
>
> Are you using the internal UART in CS5536 or do you have a superio?
> Which board did you use as template?
> Can you post a patch with your code so far?
>
>
> //Peter
>
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