[coreboot] [PATCH] Via CAR code should cache CONFIG_RAMBASE..CONFIG_RAMTOP for ramstage.

[Stefan Reinauer]

* Kevin O'Connor <kevin at koconnor.net> [110116 20:50]:
> Now that the VIA code is run above 1Meg (like other boards), it should
> cache that range instead of the first 1Meg.  This reduces boot time by
> about 1 second on epia-cn.
> 
> This patch also adds a MTRRphysMaskValid bit definition.
> 
> Signed-off-by: Kevin O'Connor <kevin at koconnor.net>

Acked-by: Stefan Reinauer <stepan at coreboot.org>