[coreboot] Porting to ASUS K8V-X SE, found possible infinite loop in pnp_get_ioresource() (pnp_device.c)

Alex G. mr.nuke.me at gmail.com
Tue Jan 11 17:35:28 CET 2011


-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hello all,

First, I want to thank everybody involved in coreboot for making it
possible.

I started porting coreboot code to the ASUS K8V-X SE Motherboard. It
uses a Socket 754, with the VIA K8T800 / VT8237R southbridge
combination, and Winbond W83627EHF SuperIO.

I took the K8T890 code, adapted the PCI ID's, and removed the PCIe
code for the southbridge. The VT8237R is already supported (Yay!), and
looking at the datasheet, The SuperIO is almost identical (I couldn't
find any difference)to the already supported W83627EHG.

I took the mainboard code for the ASUS A8V-E SE as the starting point.

It mostly works, except for an issue with initializing the PNP:
002e.207 device, which is (should be) the MIDI port, according to the
datasheet and superiotool.
The initialization code reaches pnp_get_ioresource() in
src/devices/pnp_device.c, to the following point:

/* Find the first bit that moves. */
    while ((moving & step) == 0) {
        gran--;
        step >>= 1;
    }

I put some printk's before the block, and the entering values are:
moving = 0, and step = 32768;
this leads to an infinite loop.

Is there an underlying assumption that moving will never be zero, or
is it safe to change the following to:


/* Find the first bit that moves. */
    while ((moving & step) == 0) {
        gran--;
        step >>= 1;
        if(step == 0) break;
    }

If I do something like this, I can get SeaBIOS to load (but not boot yet).

It might be that I'm doing something terribly wrong earlier on;
therefore, if you need to look at the K8T800 or motherboard code, I
can create a patch against the last svn commit (I'm curently
developing over r6247).

Alex G.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org/

iQIcBAEBAgAGBQJNLIbPAAoJEL0kPHNPXJJK2BMQAI5exEh3Ege/+HcszdNHgTur
cIzpZbWPcQGmI/tf9NB8cmkdRtBn5CkkwcGPc7JQYP60+kUaUePHT/9K0XLS1f/D
hVDTKvzHSL1yia4yWMLzGy52Q2/2PBIDjsRMgJY2qMtGASjRp5PvAueq3WnwpxtI
XQAWD7khVhnmPEF7Gx/VKRF2aYkWoosDHulzdMyiChXZnE1dkLVZ2dNyYO28a6CU
6E+5xKQySEdt+M7eWRf/CPL5MarjpbEOa6ezYnPrWZM9rJ8zFelPoBMtokDB9NDl
XOZvkDJR7iriOVwVLBSOzZOlDaiSwlCCBarqLBugmHUX8N0eiVN/OBgHMryg2Hnt
HovASJ0iIiLKFg4vNJk+nz9m8TFwV8GD+UpZz7N3zMiWpLb+/0XN7Clp22scECqg
km7ZQlzmpy6nNjdtgI/nYgqMh0hRCm+nZF3rI1X3LPbgbT6T4TkimCs0w3/bbS3h
1RIjmaxsYTIviukoqnRX14yQNIy8Tw4+lKxhi+7ev/AP4HluAZZLBw6WcnYbefH+
7JqckhTRItSjddslV9VJCxSPjEjUlE4FZ2rNvpeKxWdXWDu9vvMH1yYGuAv9528g
EbiYF8p80TnHc2snRuPe7qTtCjvi/UvHteqLAIslJ6A1C7N50Fosp01boyc10bMV
W+fciLTL4sFi3AQDJzIe
=08zU
-----END PGP SIGNATURE-----





More information about the coreboot mailing list