[coreboot] raminit.c example
corey.osgood at gmail.com
Mon Jan 3 06:14:39 CET 2011
On Sun, Jan 2, 2011 at 8:03 PM, Roger <rogerx.oss at gmail.com> wrote:
> I've read over the src/northbridge/intel/i440bx/raminit.c, but am still a
> little mystified on setting the settings.
> I can see where settings are set to zero (or default), but when I look at other
> settings, the values don't seem to match up to what is well documented within
> the comments.
> A good easy example would be setting DRAMC:
> DRAMC, 0x00, 0x08,
> Is the "0x00" designated by "000" as documented? Hex?
> What does "0x08" mean?
See sdram_set_registers(). Those values aren't written directly to the
register, because there may be some data stored in other bits that we
don't want to lose. So, for DRAMC, sdram_set_registers reads the value
of the DRAMC register (defined in i440bx.h as 0x57), then does a
logical AND with the first value, 0x00 (which will actually clear all
the bits), then performs a logical OR with the second value, 0x08,
which sets bit 3 to 1, indicating the memory type is SDRAM. It then
writes that value back to the register. In situations like this, gcc
should just optimize the whole thing down to writing 0x08 to the
register, so there's no problem with wasting CPU/IO cycles performing
More information about the coreboot