[coreboot] About the boot steps of the coreboot-V4

She, Kerry Kerry.She at amd.com
Fri Dec 16 09:10:44 CET 2011

Hello, Rock

You may need to have a look at the crt0.S,
Take amd/persimmon as an example:
#include "config.h"
 #include "src/arch/x86/init/prologue.inc"
 #include "src/cpu/x86/32bit/entry32.inc"
 #include "src/cpu/x86/fpu_enable.inc"
 #include "src/cpu/amd/agesa/cache_as_ram.inc"
 #include "mainboard/amd/persimmon/romstage.inc"


But I think it's better to learn coreboot by playing with it
on a mainboard than just reading the code.

> -----Original Message-----
> From: coreboot-bounces+kerry.she=amd.com at coreboot.org
> bounces+kerry.she=amd.com at coreboot.org] On Behalf Of Rock Cui
> Sent: Wednesday, December 07, 2011 1:19 PM
> To: coreboot at coreboot.org
> Subject: [coreboot] About the boot steps of the coreboot-V4
> Hi all,
> I'm learnning the coreboot v4 source code. But when I read the file
> entry32.inc, I don't know where the execution will jmp to after the
> __protected_start.
> I need help.
> BRs,
> Rock.
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot

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