[coreboot] Patch set updated: c2b6a77 Miscellaneous AMD F14 warning fixes

Frank Vibrans III (frank.vibrans@amd.com) gerrit at coreboot.org
Thu Aug 25 01:45:26 CEST 2011


Frank Vibrans III (frank.vibrans at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/133

-gerrit

commit c2b6a778ca9c1b3a3cdee18b8d60c35891123d9e
Author: efdesign98 <efdesign98 at gmail.com>
Date:   Thu Aug 4 16:18:16 2011 -0600

    Miscellaneous AMD F14 warning fixes
    
    This commit adds in some more fixes to AMD F14 compile
    warnings.  The change in the mtrr.c file is in prep-
    aration for changes yet to com, but it is currently
    innocuous.
    
    Change-Id: I6b204fe0af16a97d982f46f0dfeaccc4b8eb883e
    Signed-off-by: Frank Vibrans <frank.vibrans at amd.com>
    Signed-off-by: efdesign98 <efdesign98 at gmail.com>
---
 src/cpu/x86/Kconfig            |    4 ++++
 src/include/cpu/amd/amdfam14.h |    2 ++
 src/include/cpu/amd/mtrr.h     |    8 ++++++--
 src/include/pc80/i8254.h       |    2 ++
 4 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index ec559b5..eed7d8f 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -19,6 +19,10 @@ config UDELAY_TSC
 	bool
 	default n
 
+config UDELAY_TIMER2
+	bool
+	default n
+
 config TSC_CALIBRATE_WITH_IO
 	bool
 	default n
diff --git a/src/include/cpu/amd/amdfam14.h b/src/include/cpu/amd/amdfam14.h
index c4b7e6d..a732219 100644
--- a/src/include/cpu/amd/amdfam14.h
+++ b/src/include/cpu/amd/amdfam14.h
@@ -42,5 +42,7 @@ void wait_all_other_cores_started(u32 bsp_apicid);
 void wait_all_aps_started(u32 bsp_apicid);
 void allow_all_aps_stop(u32 bsp_apicid);
 #endif
+void get_bus_conf(void);
+u32 get_initial_apicid(void);
 
 #endif /* CPU_AMD_FAM14_H */
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h
index c0d6b51..3637dd9 100644
--- a/src/include/cpu/amd/mtrr.h
+++ b/src/include/cpu/amd/mtrr.h
@@ -27,8 +27,12 @@
 
 #define TOP_MEM_MSR			0xC001001A
 #define TOP_MEM2_MSR			0xC001001D
-#define TOP_MEM				TOP_MEM_MSR
-#define TOP_MEM2			TOP_MEM2_MSR
+#ifndef TOP_MEM
+  #define TOP_MEM			TOP_MEM_MSR
+#endif
+#ifndef TOP_MEM2
+  #define TOP_MEM2			TOP_MEM2_MSR
+#endif
 
 #define TOP_MEM_MASK			0x007fffff
 #define TOP_MEM_MASK_KB			(TOP_MEM_MASK >> 10)
diff --git a/src/include/pc80/i8254.h b/src/include/pc80/i8254.h
index b0d3a93..82f31e6 100644
--- a/src/include/pc80/i8254.h
+++ b/src/include/pc80/i8254.h
@@ -20,6 +20,8 @@
 #ifndef PC80_I8254_H
 #define PC80_I8254_H
 
+void setup_i8254(void);
+
 /* Ports for the 8254 timer chip */
 #define TIMER0_PORT	0x40
 #define TIMER1_PORT	0x41




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