[coreboot] New patch to review: 6c91eea Remove dead code

Alec Ari (neotheuser@ymail.com) gerrit at coreboot.org
Mon Aug 22 05:25:11 CEST 2011


Alec Ari (neotheuser at ymail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/168

-gerrit

commit 6c91eea77c72c1ca87601f08be48711b7f6080d2
Author: Alec Ari <neotheuser at ymail.com>
Date:   Sun Aug 21 22:17:35 2011 -0500

    Remove dead code
    
    Remove dead code, copy and pasted from
    tilapia's mainboard.c file into various
    asus mainboard.c files
    
    Change-Id: Ic715ccaad8ac0210401d4a99ecb11e943f6afe58
    Signed-off-by: Alec Ari <neotheuser at ymail.com>
---
 src/mainboard/asus/m4a78-em/mainboard.c |   29 -----------------------------
 src/mainboard/asus/m4a785-m/mainboard.c |   29 -----------------------------
 2 files changed, 0 insertions(+), 58 deletions(-)

diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c
index 6042d07..4854208 100644
--- a/src/mainboard/asus/m4a78-em/mainboard.c
+++ b/src/mainboard/asus/m4a78-em/mainboard.c
@@ -86,35 +86,6 @@ void set_pcie_reset()
 	pci_write_config16(sm_dev, 0x7e, word);
 }
 
-#if 0	     /* TODO: */
-/********************************************************
-* tilapia uses SB700 GPIO8 to detect IDE_DMA66.
-* IDE_DMA66 is routed to GPIO 8. So we read Gpio 8 to
-* get the cable type, 40 pin or 80 pin?
-********************************************************/
-static void get_ide_dma66(void)
-{
-	u8 byte;
-	/*u32 sm_dev, ide_dev; */
-	device_t sm_dev, ide_dev;
-
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
-
-	byte = pci_read_config8(sm_dev, 0xA9);
-	byte |= (1 << 4);	/* Set Gpio8 as input */
-	pci_write_config8(sm_dev, 0xA9, byte);
-
-	ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
-	byte = pci_read_config8(ide_dev, 0x56);
-	byte &= ~(7 << 0);
-	if ((1 << 4) & pci_read_config8(sm_dev, 0xAA))
-		byte |= 2 << 0;	/* mode 2 */
-	else
-		byte |= 5 << 0;	/* mode 5 */
-	pci_write_config8(ide_dev, 0x56, byte);
-}
-#endif
-
 /*
  * justify the dev3 is exist or not
  * NOTE: This just copied from AMD Tilapia code.
diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c
index e490f31..8a96476 100644
--- a/src/mainboard/asus/m4a785-m/mainboard.c
+++ b/src/mainboard/asus/m4a785-m/mainboard.c
@@ -95,35 +95,6 @@ void set_pcie_reset()
 	pci_write_config16(sm_dev, 0x7e, word);
 }
 
-#if 0	     /* TODO: */
-/********************************************************
-* tilapia uses SB700 GPIO8 to detect IDE_DMA66.
-* IDE_DMA66 is routed to GPIO 8. So we read Gpio 8 to
-* get the cable type, 40 pin or 80 pin?
-********************************************************/
-static void get_ide_dma66(void)
-{
-	u8 byte;
-	/*u32 sm_dev, ide_dev; */
-	device_t sm_dev, ide_dev;
-
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
-
-	byte = pci_read_config8(sm_dev, 0xA9);
-	byte |= (1 << 4);	/* Set Gpio8 as input */
-	pci_write_config8(sm_dev, 0xA9, byte);
-
-	ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
-	byte = pci_read_config8(ide_dev, 0x56);
-	byte &= ~(7 << 0);
-	if ((1 << 4) & pci_read_config8(sm_dev, 0xAA))
-		byte |= 2 << 0;	/* mode 2 */
-	else
-		byte |= 5 << 0;	/* mode 5 */
-	pci_write_config8(ide_dev, 0x56, byte);
-}
-#endif
-
 /*
  * justify the dev3 is exist or not
  * NOTE: This just copied from AMD Tilapia code.




More information about the coreboot mailing list