[coreboot] One more student would like to participate in GSoC
marcj303 at gmail.com
Mon Apr 4 19:56:16 CEST 2011
On Mon, Apr 4, 2011 at 10:51 AM, Tadas Slotkus <devtadas at gmail.com> wrote:
> I am a student at Kaunas University of Technology in Lithuania, studying
> Informatics Engineering second course and I would love to participate in
> I have received some datasheets from VIA for unsupported chipsets, I
> would like port them.
> I have good soldering skills and am able to make small printed circuit
> boards. Some of my homemade art PCBs:
> So I have to setup a convenient flashing system for future development
> which would be brick unaware. I am interested in these ideas:
> 1) flashrom remote flashing with modified SerialICE - needs to add
> flashing functionality. With SerialICE we won't need RAM working, so it
> will help developing chipset code. After reset SerialICE flashing part
> will be activated with dosens of bytes receiveid through serial port,
> and communication with HOST system will be initiated (HOST system then
> will send commands for flashing). If SerialICE won't get any bytes from
> serial port in a few milliseconds it will let the coreboot to run. We
> would use flashrom's codebase for flashing protocols...
> 2) flashrom as payload - for such implementation we should make a config
> system where we would choose which flash chip(s) are needed to be
> included in our payload's build. The rom image might be transferred
> through serial port. But payload needs RAM, so this idea is in
> discussion list.
> The first idea would be the primary objective for me. What do you think?
> Tadas Slotkus
> P.S. I have been around coreboot for some time. My earlier email in
> mailing-lists: mrtadis at gmail.com, current irc nick: mrtadis)
We are happy that you are interested in a coreboot GSoC project.
You have an interesting idea. Have you tried running SerialICE on a
platform? I think that the main items you will need to consider in
your proposal is the integration of SerialICE and coreboot. How will
the early bootblock sections work? On the flashrom side, you will need
to consider what the normal OS and library calls will do in this mode.
Also, how will it integrate with flashrom so that it stays up to date
with current chipsets and flash devices.
More information about the coreboot