[coreboot] [PATCH] 440BX registered SDRAM support

[Keith Hui]

ping?

On Wed, Mar 30, 2011 at 11:38 PM, Keith Hui <buurin at gmail.com> wrote:
> On Tue, Mar 29, 2011 at 5:34 PM, Stefan Reinauer
> <stefan.reinauer at coreboot.org> wrote:
>> * Keith Hui <buurin at gmail.com> [110329 06:11]:
>>> >> +    if ((edosd & 0x84) == 0x84) {
>>> >> +        edosd = 0x10; // Registered SDRAM
>>> >> +    } else {
>>> >> +        // Clear [4:3] in case it's EDO.
>>> >> +        edosd &= 0x07;
>>> >> +//    } else if (edosd & 0x02) {
>>> > Besides being commented out, this piece of code would never be executed,
>>> > as there already is an else case.
>>> > Also, modifying edosd in place is semi nice.
>>>
>>> So is this good, not so good, or bad?
>>>
>>> I want to know if I should split up edosd.
>>
>> Please do.
>>
>
> And so I did. Signoff in the patch.
>
> edosd was a romcc-inspired trick because variables were a scarce resource.
>
> The nbxecc simplification in this patch completed one full pass of
> memtest86+ each with a regular and registered ECC DIMM installed.
>
> With this patch the 440BX romstage is 60 bytes smaller, freeing up an
> extra 64 bytes in the image.
>
> Thanks
> Keith
>