[coreboot] [commit] r5885 - in trunk/src: cpu/amd/socket_S1G1 mainboard/amd/dbm690t mainboard/technexion/tim5690 mainboard/technexion/tim8690

repository service svn at coreboot.org
Thu Sep 30 09:56:15 CEST 2010


Author: stepan
Date: Thu Sep 30 09:56:12 2010
New Revision: 5885
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5885

Log:
fix Kontron KT690 and clean up socket S1G1 boards accordingly.

Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>

Modified:
   trunk/src/cpu/amd/socket_S1G1/Kconfig
   trunk/src/mainboard/amd/dbm690t/Kconfig
   trunk/src/mainboard/technexion/tim5690/Kconfig
   trunk/src/mainboard/technexion/tim8690/Kconfig

Modified: trunk/src/cpu/amd/socket_S1G1/Kconfig
==============================================================================
--- trunk/src/cpu/amd/socket_S1G1/Kconfig	Thu Sep 30 09:45:58 2010	(r5884)
+++ trunk/src/cpu/amd/socket_S1G1/Kconfig	Thu Sep 30 09:56:12 2010	(r5885)
@@ -1,5 +1,10 @@
 config CPU_AMD_SOCKET_S1G1
         bool
+
+if CPU_AMD_SOCKET_S1G1
+
+config SOCKET_SPECIFIC_OPTIONS
+	def_bool y
 	select K8_REV_F_SUPPORT
 	select K8_HT_FREQ_1G_SUPPORT
 	select CPU_AMD_MODEL_FXX
@@ -7,11 +12,26 @@
 config CPU_SOCKET_TYPE
 	hex
 	default 0x12
-	depends on CPU_AMD_SOCKET_S1G1
 
 #DDR2 and REG, S1G1
 config DIMM_SUPPORT
 	hex
 	default 0x0204
-	depends on CPU_AMD_SOCKET_S1G1
 
+config CPU_ADDR_BITS
+	int
+	default 40
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+
+endif

Modified: trunk/src/mainboard/amd/dbm690t/Kconfig
==============================================================================
--- trunk/src/mainboard/amd/dbm690t/Kconfig	Thu Sep 30 09:45:58 2010	(r5884)
+++ trunk/src/mainboard/amd/dbm690t/Kconfig	Thu Sep 30 09:56:12 2010	(r5885)
@@ -25,18 +25,6 @@
 	string
 	default amd/dbm690t
 
-config DCACHE_RAM_BASE
-	hex
-	default 0xc8000
-
-config DCACHE_RAM_SIZE
-	hex
-	default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x01000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x0

Modified: trunk/src/mainboard/technexion/tim5690/Kconfig
==============================================================================
--- trunk/src/mainboard/technexion/tim5690/Kconfig	Thu Sep 30 09:45:58 2010	(r5884)
+++ trunk/src/mainboard/technexion/tim5690/Kconfig	Thu Sep 30 09:56:12 2010	(r5885)
@@ -26,18 +26,6 @@
 	string
 	default technexion/tim5690
 
-config DCACHE_RAM_BASE
-	hex
-	default 0xc8000
-
-config DCACHE_RAM_SIZE
-	hex
-	default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x01000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x0

Modified: trunk/src/mainboard/technexion/tim8690/Kconfig
==============================================================================
--- trunk/src/mainboard/technexion/tim8690/Kconfig	Thu Sep 30 09:45:58 2010	(r5884)
+++ trunk/src/mainboard/technexion/tim8690/Kconfig	Thu Sep 30 09:56:12 2010	(r5885)
@@ -25,18 +25,6 @@
 	string
 	default technexion/tim8690
 
-config DCACHE_RAM_BASE
-	hex
-	default 0xc8000
-
-config DCACHE_RAM_SIZE
-	hex
-	default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x01000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x0




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