[coreboot] DUAL_VDD_BIT in cpu/amd/model_10xxx/fidvid.c

xdrudis xdrudis at tinet.cat
Wed Sep 29 13:04:18 CEST 2010


I'm looking at the fidvid code while trying to make it work 
for more revisions and so on, and I don't understand its logic.

at src/cpu/amd/model_10xxx/fidvid.c line 260 (in prep_fid_change()) it
tests F3xA0[31] to tell whether it's in a dual power plane

But  according to BKDG :

     CofVidProg: COF and VID of P-states programmed. Read-only. 1=Out
     of cold reset, the VID and FID values of the P-state register
     specified by MSRC001_0071[StartupPstate] have been applied to the
     processor.0=Out of cold reset, the boot VID is applied to all
     processor power planes, the NB clock plane is set to 800 MHz
     (with a FID of 00h=800 MHz and a DID of 0b) and core CPU clock
     planes are set to 800 MHz (with a FID of 00h=1.6 GHz and a DID of
     1h). This affects F3xD4[NbFidEn].  Registers containing P-state
     information such as FID, DID, and VID values are valid out of
     cold reset independent of the state of F3xA0[CofVidProg]. BIOS
     must transition the processor to a valid P-state out of cold
     reset when F3xA0[CofVidProg]=0. See [BIOS Requirements
     for P-State Initializa- tion and Transitions].

Does the fact that the CPU has booted into a P-state VID or a boot VID
warrant that the system is dual plane or single plane ? 
The name of the constant does not match any field I've found in the docs, 
and just 15 lines before it's setting all writeable bits in F3xA0 to 1s in a 
strange way (for PVI) which make me suspect this part of the code.

There's a somewhat related bit in F3x1FC[31]. 

     DualPlaneOnly. Revision B: Reserved. Revision C:
     Read-only. Reset: value varies by product. Spec- ifies the
     infrastructure that supports the processor. 0=The processor is
     supported by both the single- and dual-plane
     infrastructures. 1=The processor is only supported by the
     dual-plane infrastructure.  See [BIOS Configuration for
     Dual-plane Only Support].
Which I would understand as saying that if I find an 1 there
I know I'm in double plane, and if I find an 0 I don't know anything. 

So, the question is: 

a) should I use F3xA0[31] to tell I'm in single or double plane or

b) should I have a mainboard defined constant, and maybe check 
its value against F3x1FC[31] and give a warning if constant says single
plane and F3x1FC[31]=1 , or 

c) is there some input to the processor I can read to tell if I'm in
single or double plane without putting the info in the code ?

I'm assuming b, but what do you think ?

Thank you 

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