[coreboot] [commit] r5779 - in trunk/src: cpu/amd/model_lx mainboard/amd/db800 mainboard/amd/norwich mainboard/artecgroup/dbe61 mainboard/digitallogic/msm800sev mainboard/iei/pcisa-lx-800-r10 mainboard/lipper...

repository service svn at coreboot.org
Tue Sep 7 09:43:11 CEST 2010


Author: oxygene
Date: Tue Sep  7 09:43:10 2010
New Revision: 5779
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5779

Log:
Set up an arbitrary amount of system memory on Geode LX, so
coreboot_ram can be unpacked to 1MB. The value is quickly
replaced with the real value later, thus causing no harm.

Move RAMBASE to the default of 1MB for the affected boards

Signed-off-by: Aurelien Guillaume <aurelien at iwi.me>
Acked-by: Patrick Georgi <patrick.georgi at coresystems.de>

Modified:
   trunk/src/cpu/amd/model_lx/msrinit.c
   trunk/src/mainboard/amd/db800/Kconfig
   trunk/src/mainboard/amd/norwich/Kconfig
   trunk/src/mainboard/artecgroup/dbe61/Kconfig
   trunk/src/mainboard/digitallogic/msm800sev/Kconfig
   trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
   trunk/src/mainboard/lippert/roadrunner-lx/Kconfig
   trunk/src/mainboard/lippert/spacerunner-lx/Kconfig
   trunk/src/mainboard/pcengines/alix1c/Kconfig
   trunk/src/mainboard/pcengines/alix2d/Kconfig
   trunk/src/mainboard/traverse/geos/Kconfig
   trunk/src/mainboard/winent/pl6064/Kconfig

Modified: trunk/src/cpu/amd/model_lx/msrinit.c
==============================================================================
--- trunk/src/cpu/amd/model_lx/msrinit.c	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/cpu/amd/model_lx/msrinit.c	Tue Sep  7 09:43:10 2010	(r5779)
@@ -39,6 +39,19 @@
 	{MSR_GLIU1_BASE1,   {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
 	{MSR_GLIU1_BASE2,   {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF
 	{MSR_GLIU1_SHADOW,  {.hi = 0x2000FFFF,.lo = 0xFFFF0003}}, // 0xC0000-0xFFFFF
+
+	/* Pre-setup access to memory above 1Mb. Here we set up about 500Mb of memory.
+	 * It doesn't really matter in fact how much, however, because the only usage
+	 * of this extended memory will be to host the coreboot_ram stage at RAMBASE,
+	 * currently 1Mb.
+	 * These registers will be set to their correct value by the Northbridge init code.
+	 * 
+	 * WARNING: if coreboot_ram could not be loaded, these registers are probably
+	 * incorrectly set here. You may comment the following two lines and set RAMBASE
+	 * to 0x4000 to revert to the previous behavior for LX-boards.
+	 */
+	{MSR_GLIU0_SYSMEM,  {.hi = 0x2000001F,.lo = 0x6BF00100}}, // 0x100000-0x1F6BF000
+	{MSR_GLIU1_SYSMEM,  {.hi = 0x2000001F,.lo = 0x6BF00100}}, // 0x100000-0x1F6BF000
 };
 
 static void msr_init(void)

Modified: trunk/src/mainboard/amd/db800/Kconfig
==============================================================================
--- trunk/src/mainboard/amd/db800/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/amd/db800/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -25,8 +25,4 @@
 	int
 	default 4
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_AMD_DB800

Modified: trunk/src/mainboard/amd/norwich/Kconfig
==============================================================================
--- trunk/src/mainboard/amd/norwich/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/amd/norwich/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -24,8 +24,4 @@
 	int
 	default 6
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_AMD_NORWICH

Modified: trunk/src/mainboard/artecgroup/dbe61/Kconfig
==============================================================================
--- trunk/src/mainboard/artecgroup/dbe61/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/artecgroup/dbe61/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -24,8 +24,4 @@
 	int
 	default 3
 
-#config RAMBASE
-#	hex
-#	default 0x4000
-
 endif # BOARD_ARTECGROUP_DBE61

Modified: trunk/src/mainboard/digitallogic/msm800sev/Kconfig
==============================================================================
--- trunk/src/mainboard/digitallogic/msm800sev/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/digitallogic/msm800sev/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -25,8 +25,4 @@
 	int
 	default 9
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_DIGITALLOGIC_MSM800SEV

Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
==============================================================================
--- trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -24,8 +24,4 @@
 	int
 	default 9
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_IEI_PCISA_LX_800_R10

Modified: trunk/src/mainboard/lippert/roadrunner-lx/Kconfig
==============================================================================
--- trunk/src/mainboard/lippert/roadrunner-lx/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/lippert/roadrunner-lx/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -27,10 +27,6 @@
 	int
 	default 7
 
-config RAMBASE
-	hex
-	default 0x4000
-
 config ONBOARD_UARTS_RS485
 	bool "Switch on-board serial ports to RS485"
 	default n

Modified: trunk/src/mainboard/lippert/spacerunner-lx/Kconfig
==============================================================================
--- trunk/src/mainboard/lippert/spacerunner-lx/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/lippert/spacerunner-lx/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -28,10 +28,6 @@
 	int
 	default 7
 
-config RAMBASE
-	hex
-	default 0x4000
-
 config ONBOARD_UARTS_RS485
 	bool "Switch on-board serial ports to RS485"
 	default n

Modified: trunk/src/mainboard/pcengines/alix1c/Kconfig
==============================================================================
--- trunk/src/mainboard/pcengines/alix1c/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/pcengines/alix1c/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -25,8 +25,4 @@
 	int
 	default 5
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_PCENGINES_ALIX1C

Modified: trunk/src/mainboard/pcengines/alix2d/Kconfig
==============================================================================
--- trunk/src/mainboard/pcengines/alix2d/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/pcengines/alix2d/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -24,8 +24,4 @@
 	int
 	default 7
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_PCENGINES_ALIX2D

Modified: trunk/src/mainboard/traverse/geos/Kconfig
==============================================================================
--- trunk/src/mainboard/traverse/geos/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/traverse/geos/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -24,8 +24,4 @@
 	int
 	default 6
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_TRAVERSE_GEOS

Modified: trunk/src/mainboard/winent/pl6064/Kconfig
==============================================================================
--- trunk/src/mainboard/winent/pl6064/Kconfig	Mon Sep  6 22:20:47 2010	(r5778)
+++ trunk/src/mainboard/winent/pl6064/Kconfig	Tue Sep  7 09:43:10 2010	(r5779)
@@ -25,8 +25,4 @@
 	int
 	default 7
 
-config RAMBASE
-	hex
-	default 0x4000
-
 endif # BOARD_WINENT_PL6064




More information about the coreboot mailing list