[coreboot] [PATCH 2/4] Add support for dumping ACPI registers for i7.

Warren Turkal wt at penguintechs.org
Wed Sep 1 22:41:35 CEST 2010


Signed-off-by: Warren Turkal <wt at penguintechs.org>
---
 util/inteltool/powermgt.c |   65 +++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 65 insertions(+), 0 deletions(-)

diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index 5f93835..3032f4d 100644
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -21,6 +21,66 @@
 #include <stdio.h>
 #include "inteltool.h"
 
+static const io_register_t ich10_pm_registers[] = {
+	{ 0x00, 2, "PM1_STS" }, // PM1 Status; ACPI pointer: PM1a_EVT_BLK
+	{ 0x02, 2, "PM1_EN" },  // PM1 Enables; ACPI pointer: PM1a_EVT_BLK+2
+	{ 0x04, 4, "PM1_CNT" }, // PM1 Control; ACPI pointer: PM1a_CNT_BLK
+	{ 0x08, 4, "PM1_TMR" }, // PM1 Timer; ACPI pointer: PMTMR_BLK
+	{ 0x0c, 4, "RESERVED" },
+	{ 0x10, 4, "PROC_CNT" }, // Processor Control; ACPI pointer: P_BLK
+#if DANGEROUS_REGISTERS
+	/* These registers return 0 on read, but reading them may cause
+	 * the system to enter Cx states, which might hang the system.
+	 */
+	{ 0x14, 1, "LV2 (Mobile)" },
+	{ 0x15, 1, "LV3 (Mobile)" },
+	{ 0x16, 1, "LV4 (Mobile)" },
+#endif
+	{ 0x17, 2, "RESERVED" },
+	{ 0x19, 1, "RESERVED" },
+	{ 0x1a, 2, "RESERVED" },
+	{ 0x1c, 4, "RESERVED" },
+	{ 0x20, 8, "GPE0_STS" }, // General Purpose Event 0 Status; ACPI pointer: GPE0_BLK
+	{ 0x2C, 4, "GPE0_EN" },  // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8
+	{ 0x30, 4, "SMI_EN" },
+	{ 0x34, 4, "SMI_STS" },
+	{ 0x38, 2, "ALT_GP_SMI_EN" },
+	{ 0x3a, 2, "ALT_GP_SMI_STS" },
+	{ 0x3c, 1, "UPRWC" },   // USB Per-Port registers write control;
+	{ 0x3d, 2, "RESERVED" },
+	{ 0x3f, 1, "RESERVED" },
+	{ 0x40, 2, "RESERVED" },
+	{ 0x42, 1, "GPE_CNTL" },
+	{ 0x43, 1, "RESERVED" },
+	{ 0x44, 2, "DEVACT_STS" }, // Device Activity Status
+	{ 0x46, 2, "RESERVED" },
+	{ 0x48, 4, "RESERVED" },
+	{ 0x4c, 4, "RESERVED" },
+	{ 0x50, 1, "PM2_CNT (Mobile)" }, // PM2 Control (Mobile only); ACPI pointer: PM2a_CNT_BLK
+	{ 0x51, 1, "RESERVED" },
+	{ 0x52, 2, "RESERVED" },
+	{ 0x54, 4, "C3_RES (Mobile)" },
+	{ 0x58, 4, "RESERVED" },
+	{ 0x5c, 4, "RESERVED" },
+	/* Here start the TCO registers */
+	{ 0x60, 2, "TCO_RLD" },
+	{ 0x62, 1, "TCO_DAT_IN" },
+	{ 0x63, 1, "TCO_DAT_OUT" },
+	{ 0x64, 2, "TCO1_STS" },
+	{ 0x66, 2, "TCO2_STS" },
+	{ 0x68, 2, "TCO1_CNT" },
+	{ 0x6a, 2, "TCO2_CNT" },
+	{ 0x6c, 2, "TCO_MESSAGE" },
+	{ 0x6e, 1, "TCO_WDCNT" },
+	{ 0x6f, 1, "RESERVED" },
+	{ 0x70, 1, "SW_IRQ_GEN" },
+	{ 0x71, 1, "RESERVED" },
+	{ 0x72, 2, "TCO_TMR" },
+	{ 0x74, 4, "RESERVED" },
+	{ 0x78, 4, "RESERVED" },
+	{ 0x7c, 4, "RESERVED" },
+};
+
 static const io_register_t ich9_pm_registers[] = {
 	{ 0x00, 2, "PM1_STS" }, // PM1 Status; ACPI pointer: PM1a_EVT_BLK
 	{ 0x02, 2, "PM1_EN" },  // PM1 Enables; ACPI pointer: PM1a_EVT_BLK+2
@@ -473,6 +533,11 @@ int print_pmbase(struct pci_dev *sb)
 	printf("\n============= PMBASE ============\n\n");
 
 	switch (sb->device_id) {
+	case PCI_DEVICE_ID_INTEL_ICH10R:
+		pmbase = pci_read_word(sb, 0x40) & 0xff80;
+		pm_registers = ich10_pm_registers;
+		size = ARRAY_SIZE(ich10_pm_registers);
+		break;
 	case PCI_DEVICE_ID_INTEL_ICH7:
 	case PCI_DEVICE_ID_INTEL_ICH7M:
 	case PCI_DEVICE_ID_INTEL_ICH7DH:
-- 
1.7.1





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