[coreboot] coreboot+seabios timings

[Scott Duplichan]

]> For coreboot+seabios, I get a power on to DOS boot time of around 2.7
]> seconds. This is with USB enabled and a 5400 rpm sata drive. While 2.7
]> seconds is good, there is probably room for improvement. I would like
]> to see a bigger coreboot advantage over UEFI. All of these numbers are
]> for AMD hardware with family 10h processors.
]
]Thanks.  Can you post the debug output using SeaBIOS'
]tools/readserial.py program?  I'd be curious to see where the time is
]spent.
]
]Also, try the SeaBIOS options CONFIG_THREAD_OPTIONROMS and
]CONFIG_ATA_DMA.  (The ATA DMA can be a little finicky though - fixing
]it is on my todo list.)
]
]-Kevin

Hello Kevin,

I am not sure how to get that script to run from windows. I get:

$ python ../seabios-for-coreboot/tools/readserial.py com1 115200
Traceback (most recent call last):
  File "../seabios-for-coreboot/tools/readserial.py", line 129, in <module>
    main()
  File "../seabios-for-coreboot/tools/readserial.py", line 114, in main
    import serial
ImportError: No module named serial

But it hardly matters. I think coreboot is taking most of the time. For
example, I noticed a hesitation at:
     "copying VGA ROM Image from %p to 0x%x, 0x%x bytes\n"
Though the video option rom is tiny, it is in flash memory. Worse yet,
the variable mtrr range for caching the flash chip had already been
removed. I added that back and added an additional improvement: set
PrefetchEnSPIFromHost in the SB700. Without this setting, the SB700
reads dwords from flash memory. With this setting, the SB7000 reads 
entire cache lines. 

With these two changes, boot time is reduced by 650 ms. Now the boot
time is around 2.050 seconds. That is from power switch off (standby
power on) to DOS prompt.

I will submit a patch for PrefetchEnSPIFromHost because it is safe
and easy. LPC systems are not affected, only SPI.

The MTRR change is more difficult, because it is probably best to
remove the flash memory mtrr before exiting coreboot+seabios. It
might cause trouble for flash software. With SPI, caching the flash
chip for the option rom copy is not that important, because the
PrefetchEnSPIFromHost change causes the SB700 to read full cache
lines anyway. But it might be more important systems using LPC flash.

By the way, I tried your other suggestions and did not see much
of a difference. I do need to get an SSD drive because the
randomness in the rotating drive makes precise measurements
difficult. The DMA hardly matters for DOS where only a few KB
are read from disk. But it could be very important for OS booting,
where as much as hundreds of MB are read from disk using BIOS calls.

Thanks,
Scott