[coreboot] [PATCH] Convert all Intel i810 boards to CAR

Joseph Smith joe at settoplinux.org
Thu Oct 14 14:38:57 CEST 2010

On 10/14/2010 08:35 AM, Joseph Smith wrote:
> On 10/13/2010 03:00 PM, Uwe Hermann wrote:
>> Hi,
>> patch is committed with Peter's ack in r5949 as it's not really directly
>> related to this discussion and also boot-tested by me on MSI MS-6178
>> as mentioned in the patch description.
>> On Wed, Oct 13, 2010 at 09:50:52AM -0400, Joseph Smith wrote:
>>> On 10/13/2010 01:24 AM, Warren Turkal wrote:
>>>> On Tuesday 12 October 2010 19:22:43 Joseph Smith wrote:
>>>>> FC-PGA's support SSE2 while the PGA's do not. that is the
>>>>> difference. I
>>>>> created FC_PGA370 to make the CAR coversion simpler. Hope that helps.
>>>> I must be misunderstanding this entirely.
>>>> First, you say there is a difference in that the FC version support
>>>> SSE2. Then,
>>>> you say that the FC_PGA370 socket is simply a mechanism to make
>>>> conversion to
>>>> CAR easier.
>> Hm, this stuff may need some clarification and/or fixing in coreboot
>> indeed.
>> As far as I can see, e.g. from
>> http://www.cpu-world.com/Sockets/Socket%20370%20%28PGA370%29.html
>> there were 3 different sockets named socket370, all of which were
>> physically compatible, but not electrically.
>> I'm not so sure about the naming, but these seem to be the different
>> packages / form factors of the sockets:
>> - Plastic pin grid array (PPGA)
>> - Flip-chip pin grid array (FC-PGA)
>> - Flip-chip pin grid array (FC-PGA2)
>> (http://en.wikipedia.org/wiki/Socket_370)
>> Now, whether or not we need or want different socket_* directories for
>> these I'm not sure yet, probably needs some investigation.
>> However, as we're switchting all CPUs/boards to CAR sooner or later,
>> having an extra dir just for the CAR (vs. ROMCC) version of the socket
>> will not be required.
>> As for SSE/SSE2, that seems to be a mess in coreboot too right now.
> Yes. I would like to see a common socket for all three maybe just
> socket_370 (Socket 370 is all that is in most mainboard vendor
> descriptions)?. There must be some way to probe and detect what features
> the cpu has and include the features based in that? Maybe a simple table
> with the model numbers?
Anyways why can't cpu specific features be implemented at the model 
level and not at the socket level???

Joseph Smith

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