[coreboot] Add ICH5/i865 chipset detection, dumping support for model_f2x MSRs, ICH5 GPIOs and PM registers and add BAR reading support for i865

[Idwer Vollering]

Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
registers on ICH5.
Add ICH5 and i865 to the supported chips list.
Enable the dumping of BAR6 on i865.

Signed-off-by: Idwer Vollering <vidwer at gmail.com>

---

Disabling memory access:
$ sudo setpci -s 6.0 0x04.b=0x0

$ sudo ./inteltool -m | head -n 9
Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7
Intel Northbridge: 8086:2570 (i865)
Intel Southbridge: 8086:24d0 (ICH5)

============= MCHBAR ============

Access to BAR6 is currently disabled, attempting to enable.
Enabled successfully.
BAR6 = 0xfecf0000 (MEM)


Relevant lines from lspci -nnvvvxxx:

00:06.0 System peripheral [0880]: Intel Corporation 82865G/PE/P Processor to
I/O Memory Interface [8086:2576] (rev 02)
        Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Region 0: Memory at fecf0000 (32-bit, non-prefetchable) [size=4K]
00: 86 80 76 25 02 00 80 00 02 00 80 08 00 00 00 00
10: 00 00 cf fe 00 00 00 00 00 00 00 00 00 00 00 00
     ^^^^^^^^^^^^
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