[coreboot] [commit] r6124 - in trunk/src: mainboard/amd/serengeti_cheetah mainboard/amd/serengeti_cheetah_fam10 mainboard/arima/hdama mainboard/hp/dl145_g1 mainboard/ibm/e325 mainboard/ibm/e326 mainboard/iwil...
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svn at coreboot.org
Fri Nov 26 23:35:11 CET 2010
Author: uwe
Date: Fri Nov 26 23:35:11 2010
New Revision: 6124
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6124
Log:
AMD-8111: Add TINY_BOOTBLOCK support.
Also, add missing license header to amd8111_enable_rom.c, add some more code
comments and use PCI IDs from pci_ids.h instead of hardcoding.
Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Patrick Georgi <patrick at georgi-clan.de>
Modified:
trunk/src/mainboard/amd/serengeti_cheetah/romstage.c
trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
trunk/src/mainboard/arima/hdama/romstage.c
trunk/src/mainboard/hp/dl145_g1/romstage.c
trunk/src/mainboard/ibm/e325/romstage.c
trunk/src/mainboard/ibm/e326/romstage.c
trunk/src/mainboard/iwill/dk8_htx/romstage.c
trunk/src/mainboard/iwill/dk8s2/romstage.c
trunk/src/mainboard/iwill/dk8x/romstage.c
trunk/src/mainboard/newisys/khepri/romstage.c
trunk/src/mainboard/tyan/s2850/romstage.c
trunk/src/mainboard/tyan/s2875/romstage.c
trunk/src/mainboard/tyan/s2880/romstage.c
trunk/src/mainboard/tyan/s2881/romstage.c
trunk/src/mainboard/tyan/s2882/romstage.c
trunk/src/mainboard/tyan/s2885/romstage.c
trunk/src/mainboard/tyan/s4880/romstage.c
trunk/src/mainboard/tyan/s4882/romstage.c
trunk/src/southbridge/amd/amd8111/Kconfig
trunk/src/southbridge/amd/amd8111/amd8111_enable_rom.c
trunk/src/southbridge/amd/amd8111/bootblock.c
Modified: trunk/src/mainboard/amd/serengeti_cheetah/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -85,7 +85,6 @@
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#define RC0 ((1<<0)<<8)
@@ -126,7 +125,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -89,7 +89,6 @@
#include "cpu/amd/microcode/microcode.c"
#include "cpu/amd/model_10xxx/update_microcode.c"
#include "cpu/amd/model_10xxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"
static const u8 spd_addr[] = {
@@ -197,9 +196,6 @@
/* mov bsp to bus 0xff when > 8 nodes */
set_bsp_node_CHtExtNodeCfgEn();
enumerate_ht_chain();
-
- /* Setup the rom access for 4M */
- amd8111_enable_rom();
}
post_code(0x30);
Modified: trunk/src/mainboard/arima/hdama/romstage.c
==============================================================================
--- trunk/src/mainboard/arima/hdama/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/arima/hdama/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -66,7 +66,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -88,7 +87,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/hp/dl145_g1/romstage.c
==============================================================================
--- trunk/src/mainboard/hp/dl145_g1/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/hp/dl145_g1/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -88,7 +88,6 @@
#include <spd.h>
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#define RC0 ((1<<1)<<8) // Not sure about these values
@@ -115,7 +114,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/ibm/e325/romstage.c
==============================================================================
--- trunk/src/mainboard/ibm/e325/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/ibm/e325/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -63,7 +63,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -97,7 +96,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/ibm/e326/romstage.c
==============================================================================
--- trunk/src/mainboard/ibm/e326/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/ibm/e326/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -63,7 +63,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -97,7 +96,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/iwill/dk8_htx/romstage.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/iwill/dk8_htx/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -73,7 +73,6 @@
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -96,7 +95,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/iwill/dk8s2/romstage.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8s2/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/iwill/dk8s2/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -73,7 +73,6 @@
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -97,7 +96,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/iwill/dk8x/romstage.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8x/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/iwill/dk8x/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -73,7 +73,6 @@
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -97,7 +96,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/newisys/khepri/romstage.c
==============================================================================
--- trunk/src/mainboard/newisys/khepri/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/newisys/khepri/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -69,7 +69,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -91,7 +90,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s2850/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s2850/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s2850/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -59,7 +59,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -82,7 +81,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s2875/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s2875/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s2875/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -59,7 +59,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -93,7 +92,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s2880/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s2880/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s2880/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -59,7 +59,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -93,7 +92,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s2881/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s2881/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s2881/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -58,7 +58,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -80,7 +79,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s2882/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s2882/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s2882/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -59,7 +59,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -93,7 +92,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s2885/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s2885/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s2885/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -58,7 +58,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -80,7 +79,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s4880/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s4880/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s4880/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -78,7 +78,6 @@
#include <spd.h>
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#define RC0 ((1<<2)<<8)
@@ -140,7 +139,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/mainboard/tyan/s4882/romstage.c
==============================================================================
--- trunk/src/mainboard/tyan/s4882/romstage.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/mainboard/tyan/s4882/romstage.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -86,7 +86,6 @@
#include <spd.h>
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#define RC0 ((1<<2)<<8)
@@ -119,7 +118,6 @@
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- amd8111_enable_rom();
}
if (bist == 0)
Modified: trunk/src/southbridge/amd/amd8111/Kconfig
==============================================================================
--- trunk/src/southbridge/amd/amd8111/Kconfig Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/southbridge/amd/amd8111/Kconfig Fri Nov 26 23:35:11 2010 (r6124)
@@ -20,8 +20,9 @@
config SOUTHBRIDGE_AMD_AMD8111
bool
select IOAPIC
+ select TINY_BOOTBLOCK
config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/amd8111/bootblock.c"
- depends on SOUTHBRIDGE_AMD_AMD8111
+ string
+ default "southbridge/amd/amd8111/bootblock.c"
+ depends on SOUTHBRIDGE_AMD_AMD8111
Modified: trunk/src/southbridge/amd/amd8111/amd8111_enable_rom.c
==============================================================================
--- trunk/src/southbridge/amd/amd8111/amd8111_enable_rom.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/southbridge/amd/amd8111/amd8111_enable_rom.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -1,15 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Linux Networx
+ * (Written by Eric Biederman <ebiederman at lnxi.com> for Linux Networx)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_ids.h>
+
+/* Enable 5MB ROM access at 0xFFB00000 - 0xFFFFFFFF. */
static void amd8111_enable_rom(void)
{
- unsigned char byte;
+ u8 byte;
device_t dev;
- /* Enable 5MB rom access at 0xFFB00000 - 0xFFFFFFFF */
- /* Locate the amd8111 */
- dev = pci_io_locate_device(PCI_ID(0x1022, 0x7468), 0);
+ dev = pci_io_locate_device(PCI_ID(PCI_VENDOR_ID_AMD,
+ PCI_DEVICE_ID_AMD_8111_ISA), 0);
+
+ /* Note: The 0xFFFF0000 - 0xFFFFFFFF range is always enabled. */
- /* Set the 5MB enable bits */
+ /* Set the 5MB enable bits. */
byte = pci_io_read_config8(dev, 0x43);
- byte |= 0xC0;
+ byte |= (1 << 7); /* Enable 0xFFC00000-0xFFFFFFFF (4MB). */
+ byte |= (1 << 6); /* Enable 0xFFB00000-0xFFBFFFFF (1MB). */
pci_io_write_config8(dev, 0x43, byte);
}
Modified: trunk/src/southbridge/amd/amd8111/bootblock.c
==============================================================================
--- trunk/src/southbridge/amd/amd8111/bootblock.c Thu Nov 25 10:03:55 2010 (r6123)
+++ trunk/src/southbridge/amd/amd8111/bootblock.c Fri Nov 26 23:35:11 2010 (r6124)
@@ -1,6 +1,6 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
-static void bootblock_southbridge_init(void) {
- /* Setup the rom access for 4M */
+static void bootblock_southbridge_init(void)
+{
amd8111_enable_rom();
}
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