[coreboot] How M2V-MX SE implemented the S4 sleep?

[Rudolf Marek]

Hi,

> I am trying to understand how ASUS m2v-mx se implements S4 sleep. I
> think it implemented this because I tested it on a physical machine
> with coreboot and LINUX installed. And the machine can go to
> hibernation and wake up without any problem.

Yeah because OS is doing the stuff. In the past like 1990s OS was not able to do 
that and it was job of BIOS to swap memory to disk and save the hardware state. 
It was the purpose of special hibernation paritions. In other words nowdays the 
S4 is not related to BIOS at all. For bios it is like S5.

> Then I start to read the code. However, I only found following code in
> mainboard/asus/m2v-mx_se/dsdt.asl:
>
> 	/* For now only define 2 power states:
> 	 *  - S0 which is fully on
> 	 *  - S5 which is soft off
> 	 * Any others would involve declaring the wake up methods.
> 	 */
> 	Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
> 	Name (\_S3, Package () { 0x01, 0x01, 0x00, 0x00 })
> 	Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
>
> The above code said the board only supports s0 s3, and s5. So
> something is missing? Why the Linux hibernation works but the code
> said it only supports s3 and s5? Any suggestions? Thanks.
>
> BTW: the comments for the code is wrong. The code also supports S3.
> Also, I tested S3 on the same machine, but it turned out to be a
> reboot. Is it a coreboot problem or Linux problem?

It worked in the past but it was tricky. Basically we reserved the memory in 
which coreboot run. Stephan reworked that with the memory copy and I never 
finished the patch to make it work on AMD. I have some patch it was even working 
with new infastructure but I never finished that.

It uses the the coreboot tables infrastructure and it was bit tricky - I had to 
save the pointer to it in NVRAM. I can dig out the patch and see if I can get it 
to work again. Maybe  someone wiith moree time can polish the patch to make it 
sane for inclusion.

Thanks,
Rudolf