[coreboot] [commit] r6085 - in trunk/src: cpu/intel/speedstep include/cpu/intel mainboard/intel/eagleheights
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Wed Nov 17 22:52:15 CET 2010
Author: oxygene
Date: Wed Nov 17 22:52:15 2010
New Revision: 6085
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6085
Log:
Move Intel power management related defines to some central location.
Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
Acked-by: Patrick Georgi <patrick at georgi-clan.de>
Added:
trunk/src/include/cpu/intel/acpi.h
Modified:
trunk/src/cpu/intel/speedstep/acpi.c
trunk/src/mainboard/intel/eagleheights/romstage.c
Modified: trunk/src/cpu/intel/speedstep/acpi.c
==============================================================================
--- trunk/src/cpu/intel/speedstep/acpi.c Wed Nov 17 17:27:06 2010 (r6084)
+++ trunk/src/cpu/intel/speedstep/acpi.c Wed Nov 17 22:52:15 2010 (r6085)
@@ -25,6 +25,7 @@
#include <arch/acpigen.h>
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
+#include <cpu/intel/acpi.h>
#include <device/device.h>
// XXX: PSS table values for power consumption are for Merom only
@@ -83,8 +84,6 @@
int max_states=8;
int busratio_step=2;
-#define IA32_PLATFORM_ID 0x017
-#define IA32_PERF_STS 0x198
msr = rdmsr(IA32_PERF_STS);
int busratio_min=(msr.lo >> 24) & 0x1f;
int busratio_max=(msr.hi >> (40-32)) & 0x1f;
Added: trunk/src/include/cpu/intel/acpi.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ trunk/src/include/cpu/intel/acpi.h Wed Nov 17 22:52:15 2010 (r6085)
@@ -0,0 +1,5 @@
+#define IA32_PLATFORM_ID 0x017
+#define IA32_PERF_STS 0x198
+#define IA32_PERF_CTL 0x199
+#define MSR_THERM2_CTL 0x19D
+#define IA32_MISC_ENABLES 0x1A0
Modified: trunk/src/mainboard/intel/eagleheights/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/eagleheights/romstage.c Wed Nov 17 17:27:06 2010 (r6084)
+++ trunk/src/mainboard/intel/eagleheights/romstage.c Wed Nov 17 22:52:15 2010 (r6085)
@@ -33,6 +33,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
+#include <cpu/intel/acpi.h>
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
@@ -44,11 +45,6 @@
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0)
#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-#define IA32_PERF_STS 0x198
-#define IA32_PERF_CTL 0x199
-#define MSR_THERM2_CTL 0x19D
-#define IA32_MISC_ENABLES 0x1A0
-
/* SATA */
#define SATA_MAP 0x90
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