[coreboot] [commit] r6068 - trunk/src/southbridge/via/vt8237r
repository service
svn at coreboot.org
Sun Nov 14 15:12:14 CET 2010
Author: ruik
Date: Sun Nov 14 15:12:14 2010
New Revision: 6068
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6068
Log:
Currently the
cablesel |= (sb->ide0_80pin_cable << 28) |
(sb->ide0_80pin_cable << 20) |
(sb->ide1_80pin_cable << 12) |
(sb->ide1_80pin_cable << 4);
in vt8237r_ide.c ends up doing
cablesel |= 0xfffffff0;
(with both bits set to 1) which is probably not the intended result. ;)
After a short discussion on irc the consensus was to change the
bitfields to u8 as it's probably not worth it using bitfields here.
Signed-off-by: Tobias Diedrich <ranma+coreboot at tdiedrich.de>
Acked-by: Rudolf Marek <r.marek at assembler.cz>
Modified:
trunk/src/southbridge/via/vt8237r/chip.h
Modified: trunk/src/southbridge/via/vt8237r/chip.h
==============================================================================
--- trunk/src/southbridge/via/vt8237r/chip.h Sat Nov 13 20:07:59 2010 (r6067)
+++ trunk/src/southbridge/via/vt8237r/chip.h Sun Nov 14 15:12:14 2010 (r6068)
@@ -50,12 +50,12 @@
*/
u16 fn_ctrl_hi;
- int ide0_enable:1;
- int ide1_enable:1;
+ u8 ide0_enable;
+ u8 ide1_enable;
/* 1 = 80-pin cable, 0 = 40-pin cable */
- int ide0_80pin_cable:1;
- int ide1_80pin_cable:1;
+ u8 ide0_80pin_cable;
+ u8 ide1_80pin_cable;
};
#endif /* SOUTHBRIDGE_VIA_VT8237R_CHIP_H */
More information about the coreboot
mailing list