[coreboot] [commit] r5590 - trunk/src/cpu/intel/microcode
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svn at coreboot.org
Wed May 26 14:53:43 CEST 2010
Author: stepan
Date: Wed May 26 14:53:43 2010
New Revision: 5590
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5590
Log:
cosmetical changes on intel's microcode.c
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Modified:
trunk/src/cpu/intel/microcode/microcode.c
Modified: trunk/src/cpu/intel/microcode/microcode.c
==============================================================================
--- trunk/src/cpu/intel/microcode/microcode.c Wed May 26 01:06:42 2010 (r5589)
+++ trunk/src/cpu/intel/microcode/microcode.c Wed May 26 14:53:43 2010 (r5590)
@@ -8,27 +8,26 @@
#include <cpu/intel/microcode.h>
struct microcode {
- uint32_t hdrver;
- uint32_t rev;
- uint32_t date;
- uint32_t sig;
-
- uint32_t cksum;
- uint32_t ldrver;
- uint32_t pf;
+ u32 hdrver; /* Header Version */
+ u32 rev; /* Patch ID */
+ u32 date; /* DATE */
+ u32 sig; /* CPUID */
+
+ u32 cksum; /* Checksum */
+ u32 ldrver; /* Loader Version */
+ u32 pf; /* Platform ID */
- uint32_t data_size;
- uint32_t total_size;
+ u32 data_size; /* Data size */
+ u32 total_size; /* Total size */
- uint32_t reserved[3];
- uint32_t bits[1012];
+ u32 reserved[3];
+ u32 bits[1012];
};
-
-static inline uint32_t read_microcode_rev(void)
+static inline u32 read_microcode_rev(void)
{
/* Some Intel Cpus can be very finicky about the
- * cpuid sequence used. So this is implemented in
+ * CPUID sequence used. So this is implemented in
* assembly so that it works reliably.
*/
msr_t msr;
@@ -47,7 +46,7 @@
: /* inputs */
: /* trashed */
"ecx"
- );
+ );
return msr.hi;
}
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