[coreboot] [PATCH][again] 440BX raminit cleanup

Stefan Reinauer stefan.reinauer at coresystems.de
Tue May 18 18:02:26 CEST 2010


>
> A number of cleanups for 440BX raminit code.
>
> Resolves a number of TODOs items within, and clarified a number of other TODOs.
> Change register_values[] from long to u8 (byte). For what we are doing
> this is sufficient and makes it only 1/4 the size.
> Remove a hard-coding of SDRAMC register that is redundant and now
> incorrect, now that SDRAMC is conditioned on SDRAMPWR_4DIMM Kconfig
> and set through register_values[].
> RPS registers are now set in runtime code; remove it from
> register_values[] table.
> Bring DUMPNORTH() back. The code it refers to is still there.
> Move #define of NB up so the DUMPNORTH() macro can use it.
>
> Signed-off-by: Keith Hui <buurin at gmail.com>
>   

-// no dump_pci_device in src/northbridge/intel/i440bx
-// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
-#define DUMPNORTH()
+#define DUMPNORTH() dump_pci_device(NB)

Does this still compile with CONFIG_DEBUG_RAM_SETUP set?


+ * Bits referencing empty rows are ëdonít careí.

that looks odd...



- /* TODO: Set SDRAMC. */
- pci_write_config16(NB, SDRAMC, 0x0010); /* SDRAMPWR=1: 4 DIMM config */
-

This part is deleted without a replacement. Is it not needed? Is this
set somewhere else?




-- 
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info at coresystems.dehttp://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866





More information about the coreboot mailing list