[coreboot] PATCH: model_6bx CPUs can go in a lot of places

[Idwer Vollering]

2010/5/7 Keith Hui <buurin at gmail.com>

> I think I should get CAR running. But CAR is not quite developed for
> the rest of the 6xx family.
>
> If you look at the boot log you'll see that it got through to SeaBIOS
> just fine. My coreboot is still on romcc.
>
> What are the steps needed to enable CAR on a board?
>

Example: see attached patch (as an example/reference only because
USE_PRINTK_IN_CAR, in src/mainboard/asus/p2b/Kconfig, somehow breaks
booting/serial output.. waiting for my pci post card to arrive).

>
> Thanks
> Keith
>
> On 5/7/10, Joseph Smith <joe at settoplinux.org> wrote:
> >
> >
> >
> > On Thu, 6 May 2010 23:31:49 -0400, Keith Hui <buurin at gmail.com> wrote:
> >> Hi all,
> >>
> >> Intel model 6bx CPUs (specifically 6B1 and 6B4) can end up in a lot of
> >> places, specifically Slot 1 and Socket 370. Ever since references to
> >> them were removed from cpu/intel/model_6xx my coreboot would die when
> >> initializing CPU with a "Unknown cpu" error. This patch fixes it by
> >> adding references to model_6bx to cpu/intel/slot_1 and
> >> cpu/intel/socket_PGA370. Also included are before and after boot logs
> >> with relevant sections highlighted.
> >>
> >> Before boot log: http://coreboot.pastebin.com/CGWgihaG
> >> After boot log: http://coreboot.pastebin.com/GLgnpZT6
> >>
> >> Signed-off-by: Keith Hui <buurin at gmail.com>
> >>
> >> ----- Begin patch -----
> >> Index: src/cpu/intel/slot_1/Makefile.inc
> >> ===================================================================
> >> --- src/cpu/intel/slot_1/Makefile.inc        (revision 5527)
> >> +++ src/cpu/intel/slot_1/Makefile.inc        (working copy)
> >> @@ -20,6 +20,7 @@
> >>
> >>  obj-y += slot_1.o
> >>  subdirs-y += ../model_6xx
> >> +subdirs-y += ../model_6bx
> >>  subdirs-y += ../../x86/tsc
> >>  subdirs-y += ../../x86/mtrr
> >>  subdirs-y += ../../x86/lapic
> >> Index: src/cpu/intel/socket_PGA370/Makefile.inc
> >> ===================================================================
> >> --- src/cpu/intel/socket_PGA370/Makefile.inc (revision 5527)
> >> +++ src/cpu/intel/socket_PGA370/Makefile.inc (working copy)
> >> @@ -20,6 +20,7 @@
> >>
> >>  obj-y += socket_PGA370.o
> >>  subdirs-y += ../model_6xx
> >> +subdirs-y += ../model_6bx
> >>  subdirs-y += ../../x86/tsc
> >>  subdirs-y += ../../x86/mtrr
> >>  subdirs-y += ../../x86/lapic
> >>
> >> ----- End patch -----
> >>
> > Hello Keith,
> > I kind of saw this coming. That is why I left the 6bx's in model_6xx. The
> > new model_6bx is intended for CAR, so I don't know how well it will work
> > with romcc. My advice is to either get CAR running on your board, or we
> put
> > back the 6bx's in model_6xx for the interim.
> >
> > --
> > Thanks,
> > Joseph Smith
> > Set-Top-Linux
> > www.settoplinux.org
> >
> >
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>
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