[coreboot] [commit] r5240 - in trunk/src/southbridge/amd: sb600 sb700

[repository service]

Author: zbao
Date: Wed Mar 17 04:10:39 2010
New Revision: 5240
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5240

Log:
The SB600 also has the BootFailTimer. We should disable it,
otherwise it will keeps reboot. The comment was also added in
detail to make less confusing when we debug SB600/SB700.

Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Acked-by: Stefan Reinauer <stepan at coresystems.de>

Modified:
   trunk/src/southbridge/amd/sb600/sb600_early_setup.c
   trunk/src/southbridge/amd/sb700/sb700_early_setup.c

Modified: trunk/src/southbridge/amd/sb600/sb600_early_setup.c
==============================================================================
--- trunk/src/southbridge/amd/sb600/sb600_early_setup.c	Wed Mar 17 03:48:24 2010	(r5239)
+++ trunk/src/southbridge/amd/sb600/sb600_early_setup.c	Wed Mar 17 04:10:39 2010	(r5240)
@@ -71,8 +71,16 @@
 	u32 reg32;
 	device_t dev;
 
-	/* Enable lpc controller */
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);	/* SMBUS controller */
+	/* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!!
+	 * This bit has no meaning if debug strap is not enabled. So if the
+	 * board keeps rebooting and the code fails to reach here, we could
+	 * disable the debug strap first. */
+	reg32 = pci_read_config32(dev, 0x4C);
+	reg32 |= 1 << 31;
+	pci_write_config32(dev, 0x4C, reg32);
+
+	/* Enable lpc controller */
 	reg32 = pci_read_config32(dev, 0x64);
 	reg32 |= 1 << 20;
 	pci_write_config32(dev, 0x64, reg32);

Modified: trunk/src/southbridge/amd/sb700/sb700_early_setup.c
==============================================================================
--- trunk/src/southbridge/amd/sb700/sb700_early_setup.c	Wed Mar 17 03:48:24 2010	(r5239)
+++ trunk/src/southbridge/amd/sb700/sb700_early_setup.c	Wed Mar 17 04:10:39 2010	(r5240)
@@ -102,8 +102,11 @@
 	u32 reg32;
 	device_t dev;
 
-	/* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!! */
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);	/* SMBUS controller */
+	/* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!!
+	 * This bit has no meaning if debug strap is not enabled. So if the
+	 * board keeps rebooting and the code fails to reach here, we could
+	 * disable the debug strap first. */
 	reg32 = pci_read_config32(dev, 0x4C);
 	reg32 |= 1 << 31;
 	pci_write_config32(dev, 0x4C, reg32);