[coreboot] [commit] r5237 - in trunk/src: cpu/intel/model_f0x cpu/intel/model_f1x cpu/intel/model_f2x cpu/intel/model_f3x cpu/intel/model_f4x cpu/intel/socket_mPGA604 mainboard/dell/s1850 southbridge/intel/i8...
repository service
svn at coreboot.org
Wed Mar 17 03:09:12 CET 2010
Author: stepan
Date: Wed Mar 17 03:09:12 2010
New Revision: 5237
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5237
Log:
fix dell s1850, ROMCC didn't seem to like SSE2 memtest here.
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Modified:
trunk/src/cpu/intel/model_f0x/Kconfig
trunk/src/cpu/intel/model_f1x/Kconfig
trunk/src/cpu/intel/model_f2x/Kconfig
trunk/src/cpu/intel/model_f3x/Kconfig
trunk/src/cpu/intel/model_f4x/Kconfig
trunk/src/cpu/intel/socket_mPGA604/Kconfig
trunk/src/mainboard/dell/s1850/Kconfig
trunk/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
Modified: trunk/src/cpu/intel/model_f0x/Kconfig
==============================================================================
--- trunk/src/cpu/intel/model_f0x/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/cpu/intel/model_f0x/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -1,4 +1,3 @@
config CPU_INTEL_MODEL_F0X
bool
select SMP
- select SSE2
Modified: trunk/src/cpu/intel/model_f1x/Kconfig
==============================================================================
--- trunk/src/cpu/intel/model_f1x/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/cpu/intel/model_f1x/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -1,4 +1,3 @@
config CPU_INTEL_MODEL_F1X
bool
select SMP
- select SSE2
Modified: trunk/src/cpu/intel/model_f2x/Kconfig
==============================================================================
--- trunk/src/cpu/intel/model_f2x/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/cpu/intel/model_f2x/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -1,4 +1,3 @@
config CPU_INTEL_MODEL_F2X
bool
select SMP
- select SSE2
Modified: trunk/src/cpu/intel/model_f3x/Kconfig
==============================================================================
--- trunk/src/cpu/intel/model_f3x/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/cpu/intel/model_f3x/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -1,4 +1,3 @@
config CPU_INTEL_MODEL_F3X
bool
select SMP
- select SSE2
Modified: trunk/src/cpu/intel/model_f4x/Kconfig
==============================================================================
--- trunk/src/cpu/intel/model_f4x/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/cpu/intel/model_f4x/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -1,4 +1,3 @@
config CPU_INTEL_MODEL_F4X
bool
select SMP
- select SSE2
Modified: trunk/src/cpu/intel/socket_mPGA604/Kconfig
==============================================================================
--- trunk/src/cpu/intel/socket_mPGA604/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/cpu/intel/socket_mPGA604/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -6,3 +6,11 @@
select MMX
select SSE
select UDELAY_TSC
+
+# mPGA604 are usually Intel Netburst CPUs which should have SSE2
+# but the ramtest.c code on the Dell S1850 seems to choke on
+# enabling it, so disable it for now.
+config SSE2
+ bool
+ default n
+ depends on CPU_INTEL_SOCKET_MPGA604
Modified: trunk/src/mainboard/dell/s1850/Kconfig
==============================================================================
--- trunk/src/mainboard/dell/s1850/Kconfig Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/mainboard/dell/s1850/Kconfig Wed Mar 17 03:09:12 2010 (r5237)
@@ -11,6 +11,7 @@
select BOARD_HAS_HARD_RESET
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
+ select USE_WATCHDOG_ON_BOOT
select BOARD_ROMSIZE_KB_1024
select UDELAY_TSC
Modified: trunk/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
==============================================================================
--- trunk/src/southbridge/intel/i82801ex/i82801ex_watchdog.c Wed Mar 17 02:51:11 2010 (r5236)
+++ trunk/src/southbridge/intel/i82801ex/i82801ex_watchdog.c Wed Mar 17 03:09:12 2010 (r5237)
@@ -1,4 +1,5 @@
#include <console/console.h>
+#include <watchdog.h>
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
More information about the coreboot
mailing list