[coreboot] [Patch] SSE & SSE2
joe at settoplinux.org
Tue Mar 16 18:00:23 CET 2010
On Tue, 16 Mar 2010 10:31:37 -0600, Myles Watson <mylesgw at gmail.com> wrote:
> This patch selects SSE & SSE2 in the socket if one exists (except for AMD
> since there are many sockets for two models).
> The reasoning is that sockets can support multiple models of CPUS for
> and SSE & SSE2 settings need to be based on the least capable CPU.
> It's all correct as far as Google tells me.
> Socket PGA370 - SSE but not SSE2 (supports PIII)
> Slot 1 - SSE but not SSE2
> Slot 2 - SSE but not SSE2
> Via C3 - SSE but not SSE2
> Via C7 - SSE and SSE2
> Qemu - not SSE2 (I don't know about SSE, so I didn't set it)
> Geode - not SSE or SSE2
> intel ep80579 SSE and SSE2
> Socket 441 SSE and SSE2
> Socket mPGA479M SSE and SSE2
> Socket mPGA604 SSE and SSE2
> Socket BGA956 MMX and SSE and SSE2
> Socket mFCPGA478 MMX and SSE and SSE2
> Socket mPGA478 MMX and SSE and SSE2
> Socket mPGA603 MMX and SSE and SSE2
Yes this looks correct.
> some intel model_f?x Kconfig files weren't being sourced in
> Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Joseph Smith <joe at settoplinux.org>
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