[coreboot] coreboot and MSM800BEV

Piotr Piwko piotr.piwko at gmail.com
Tue Jan 12 09:35:45 CET 2010


2010/1/12 Piotr Piwko <piotr.piwko at gmail.com>:
>> Did you already try the v3 support for adl/msm800sev?
> No I didn't. I am just going to try it. Of course, I will report my
> progress here :)

So, here we go :)

I attached the first log of coreboot-v3 booting process for
adl/msm800sev board. As we can see there are the same errors with SMB.
I suppose they are related as previously with the references to DIMM1
which are not present in this board.

In the other hand, these lines make me worried:

...
LAR: seen member bootblock at 0xffffafc0, size 20480
LAR: File not found!
LAR: Run file fallback/initram/segment0 failed: No such file.
Fallback failed. Try normal boot
...

-- 
Piotr Piwko
http://www.embedded-engineering.pl/
-------------- next part --------------
coreboot-3.0.1177 Tue Jan 12 09:01:13 CET 2010 starting... (console_loglevel=8)
Choosing fallback boot.
LAR: Attempting to open 'fallback/initram/segment0'.
LAR: Start 0xfff00000 len 0x100000
LAR: seen member normal/option_table at 0xfff00000, size 1160
LAR: seen member normal/initram/segment0 at 0xfff004e0, size 6400
LAR: seen member normal/stage2/segment0 at 0xfff01e30, size 1
LAR: seen member normal/stage2/segment1 at 0xfff01e90, size 22110
LAR: seen member normal/stage2/segment2 at 0xfff07540, size 525
LAR: seen member normal/payload/auto.conf at 0xfff077a0, size 288
LAR: seen member normal/payload/auto.conf.cmd at 0xfff07910, size 72
LAR: seen member normal/payload/bootlog_module.o/segment0 at 0xfff079b0, size 1
LAR: seen member normal/payload/cbfs_module.o/segment0 at 0xfff07a20, size 1
LAR: seen member normal/payload/config.h at 0xfff07a90, size 313
LAR: seen member normal/payload/coreboot_module.o/segment0 at 0xfff07c20, size 1
LAR: seen member normal/payload/coreinfo.elf/segment0 at 0xfff07c90, size 1
LAR: seen member normal/payload/coreinfo.elf/segment1 at 0xfff07d00, size 17883
LAR: seen member normal/payload/coreinfo.o/segment0 at 0xfff0c340, size 1
LAR: seen member normal/payload/cpuinfo_module.o/segment0 at 0xfff0c3b0, size 1
LAR: seen member normal/payload/lar_module.o/segment0 at 0xfff0c420, size 1
LAR: seen member normal/payload/multiboot_module.o/segment0 at 0xfff0c490, size 1
LAR: seen member normal/payload/pci_module.o/segment0 at 0xfff0c500, size 1
LAR: seen member normal/payload/ramdump_module.o/segment0 at 0xfff0c570, size 1
LAR: seen member normal/payload/util/kconfig/lex.zconf.c at 0xfff0c5e0, size 13315
LAR: seen member normal/payload/util/kconfig/lxdialog/checklist.o/segment0 at 0xff1
LAR: seen member normal/payload/util/kconfig/lxdialog/menubox.o/segment0 at 0xfff01
LAR: seen member normal/payload/util/kconfig/lxdialog/textbox.o/segment0 at 0xfff01
LAR: seen member normal/payload/util/kconfig/lxdialog/util.o/segment0 at 0xfff0fbd1
LAR: seen member normal/payload/util/kconfig/mconf/segment0 at 0xfff0fc50, size 1
LAR: seen member normal/payload/util/kconfig/mconf/segment1 at 0xfff0fcc0, size 360
LAR: seen member normal/payload/util/kconfig/mconf/segment2 at 0xfff18d00, size 557
LAR: seen member normal/payload/util/kconfig/mconf.o/segment0 at 0xfff18f90, size 1
LAR: seen member normal/payload/util/kconfig/zconf.hash.c at 0xfff19000, size 1871
LAR: seen member normal/payload/util/kconfig/zconf.tab.c at 0xfff197b0, size 16212
LAR: seen member normal/payload/util/kconfig/zconf.tab.o/segment0 at 0xfff1d770, s1
LAR: seen member bootblock at 0xffffafc0, size 20480
LAR: File not found!
LAR: Run file fallback/initram/segment0 failed: No such file.
Fallback failed. Try normal boot
LAR: Attempting to open 'normal/initram/segment0'.
LAR: Start 0xfff00000 len 0x100000
LAR: seen member normal/option_table at 0xfff00000, size 1160
LAR: seen member normal/initram/segment0 at 0xfff004e0, size 6400
LAR: CHECK normal/initram/segment0 @ 0xfff004e0
start 0xfff00530 len 6400 reallen 6400 compression 0 entry 0x00001206 loadaddre0
Entry point is 0xfff01736
pll_reset: read msr 0x4c000014
_MSR GLCP_SYS_RSTPLL (4c000014) value is: 00000392:0000180c
Configuring PLL
Resetting the processor after PLL configuration for the changes to take effect


coreboot-3.0.1177 Tue Jan 12 09:01:13 CET 2010 starting... (console_loglevel=8)
Choosing fallback boot.
LAR: Attempting to open 'fallback/initram/segment0'.
LAR: Start 0xfff00000 len 0x100000
LAR: seen member normal/option_table at 0xfff00000, size 1160
LAR: seen member normal/initram/segment0 at 0xfff004e0, size 6400
LAR: seen member normal/stage2/segment0 at 0xfff01e30, size 1
LAR: seen member normal/stage2/segment1 at 0xfff01e90, size 22110
LAR: seen member normal/stage2/segment2 at 0xfff07540, size 525
LAR: seen member normal/payload/auto.conf at 0xfff077a0, size 288
LAR: seen member normal/payload/auto.conf.cmd at 0xfff07910, size 72
LAR: seen member normal/payload/bootlog_module.o/segment0 at 0xfff079b0, size 1
LAR: seen member normal/payload/cbfs_module.o/segment0 at 0xfff07a20, size 1
LAR: seen member normal/payload/config.h at 0xfff07a90, size 313
LAR: seen member normal/payload/coreboot_module.o/segment0 at 0xfff07c20, size 1
LAR: seen member normal/payload/coreinfo.elf/segment0 at 0xfff07c90, size 1
LAR: seen member normal/payload/coreinfo.elf/segment1 at 0xfff07d00, size 17883
LAR: seen member normal/payload/coreinfo.o/segment0 at 0xfff0c340, size 1
LAR: seen member normal/payload/cpuinfo_module.o/segment0 at 0xfff0c3b0, size 1
LAR: seen member normal/payload/lar_module.o/segment0 at 0xfff0c420, size 1
LAR: seen member normal/payload/multiboot_module.o/segment0 at 0xfff0c490, size 1
LAR: seen member normal/payload/pci_module.o/segment0 at 0xfff0c500, size 1
LAR: seen member normal/payload/ramdump_module.o/segment0 at 0xfff0c570, size 1
LAR: seen member normal/payload/util/kconfig/lex.zconf.c at 0xfff0c5e0, size 13315
LAR: seen member normal/payload/util/kconfig/lxdialog/checklist.o/segment0 at 0xff1
LAR: seen member normal/payload/util/kconfig/lxdialog/menubox.o/segment0 at 0xfff01
LAR: seen member normal/payload/util/kconfig/lxdialog/textbox.o/segment0 at 0xfff01
LAR: seen member normal/payload/util/kconfig/lxdialog/util.o/segment0 at 0xfff0fbd1
LAR: seen member normal/payload/util/kconfig/mconf/segment0 at 0xfff0fc50, size 1
LAR: seen member normal/payload/util/kconfig/mconf/segment1 at 0xfff0fcc0, size 360
LAR: seen member normal/payload/util/kconfig/mconf/segment2 at 0xfff18d00, size 557
LAR: seen member normal/payload/util/kconfig/mconf.o/segment0 at 0xfff18f90, size 1
LAR: seen member normal/payload/util/kconfig/zconf.hash.c at 0xfff19000, size 1871
LAR: seen member normal/payload/util/kconfig/zconf.tab.c at 0xfff197b0, size 16212
LAR: seen member normal/payload/util/kconfig/zconf.tab.o/segment0 at 0xfff1d770, s1
LAR: seen member bootblock at 0xffffafc0, size 20480
LAR: File not found!
LAR: Run file fallback/initram/segment0 failed: No such file.
Fallback failed. Try normal boot
LAR: Attempting to open 'normal/initram/segment0'.
LAR: Start 0xfff00000 len 0x100000
LAR: seen member normal/option_table at 0xfff00000, size 1160
LAR: seen member normal/initram/segment0 at 0xfff004e0, size 6400
LAR: CHECK normal/initram/segment0 @ 0xfff004e0
start 0xfff00530 len 6400 reallen 6400 compression 0 entry 0x00001206 loadaddre0
Entry point is 0xfff01736
pll_reset: read msr 0x4c000014
_MSR GLCP_SYS_RSTPLL (4c000014) value is: 00000392:07de000c
Done pll_reset
spd_read_byte dev 00a0
 addr 0d returns 08
spd_read_byte dev 00a0
 addr 05 returns 02
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 0d returns ff
Done cpubug fixes
spd_read_byte dev 00a0
 addr 15 returns 20
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 15 returns ff
spd_read_byte dev 00a0
 addr 09 returns 60
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 09 returns ff
ddr max speed is 333
========== Check present =======================================================
spd_read_byte dev 00a0
 addr 02 returns 07
========== MODBANKS ============================================================
spd_read_byte dev 00a0
 addr 05 returns 02
========== FIELDBANKS ==========================================================
spd_read_byte dev 00a0
 addr 11 returns 04
========== SPDNUMROWS ==========================================================
spd_read_byte dev 00a0
 addr 03 returns 0d
spd_read_byte dev 00a0
 addr 04 returns 0a
========== SPDBANKDENSITY ======================================================
spd_read_byte dev 00a0
 addr 1f returns 40
DIMM size is 80
========== BEFORT CTZ ==========================================================
========== TEST DIMM SIZE>8 ====================================================
========== PAGESIZE ============================================================
spd_read_byte dev 00a0
 addr 04 returns 0a
========== MAXCOLADDR ==========================================================
========== RDMSR CF07 ==========================================================
========== WRMSR CF07 ==========================================================
CF07(20000018): 10071007.00000040
========== ALL DONE ============================================================
========== Check present =======================================================
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 02 returns ff
spd_read_byte dev 00a0
 addr 12 returns 0c
spd_read_byte dev 00a0
 addr 17 returns 75
spd_read_byte dev 00a0
 addr 19 returns 00
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 12 returns ff
Set CAS latency to 2
spd_read_byte dev 00a0
 addr 1e returns 2a
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 1e returns ff
spd_read_byte dev 00a0
 addr 1b returns 48
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 1b returns ff
spd_read_byte dev 00a0
 addr 1d returns 48
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 1d returns ff
spd_read_byte dev 00a0
 addr 1c returns 30
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 1c returns ff
spd_read_byte dev 00a0
 addr 2a returns 48
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 2a returns ff
spd_read_byte dev 00a0
 addr 16 returns 00
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 16 returns ff
spd_read_byte dev 00a0
 addr 0c returns 82
spd_read_byte dev 00a2
SMBus WAIT ERROR 13
SMBus READ ERROR: smbus_send_slave_address; device a2SMBus WAIT ERROR 13
 addr 0c returns ff
Refresh rate set to 7
DRAM controller init done.
RAM DLL lock
Before wbinvd


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