[coreboot] [PATCH]Hide crt0s from user

[Uwe Hermann]

On Thu, Feb 25, 2010 at 10:40:41AM +0100, Patrick Georgi wrote:
> attached patch moves all crt0s from the mainboards' Makefiles to
> src/arch/i386/Makefile.inc, adding conditionals where necessary. Thus,
> for adding a board, you don't have to care about these anymore.

Nice!


> Some romstraps were missing (or in one case too much), and this is much
> more regular now, depending only on the presence of the chipset
> component that requires them. In particular, these boards were missing
> romstraps, which were lost on the newconfig/kconfig transition:
> - asus/a8n_e
> - msi/ms7260
> - msi/ms9282
> - sunw/ultra40
> It might be that these didn't work with Kconfig and will work again
> after this patch.

Confirmed, I had a patch to fix this (at least for A8N-E), which should
be obsolete now (but I will test on hardware later).

 
> There are three options how to move on from here (if this change is
> accepted):
> 1. Keep the decisions in Makefile.inc
> 2. Move chip specific includes into the chip's Makefile.inc
> 3. Create a static file, instead of building it from crt0s
> 
> Option 2 would move chipset decisions to the chipsets, option 3 would
> simplify the buildsystem. Both are simple, now that things are centralized.

Hm, not sure what the best option is, both 1 and 2 sound good.

 
> Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>

Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

(if the build doesn't break, which I assume is tested)


> Index: src/cpu/via/model_c3/Kconfig
> ===================================================================
> --- src/cpu/via/model_c3/Kconfig	(revision 5158)
> +++ src/cpu/via/model_c3/Kconfig	(working copy)
> @@ -1,3 +1,4 @@
>  config CPU_VIA_C3
>  	bool
>  	select UDELAY_TSC
> +	select MMX
> Index: src/cpu/via/model_c7/Kconfig
> ===================================================================
> --- src/cpu/via/model_c7/Kconfig	(revision 5158)
> +++ src/cpu/via/model_c7/Kconfig	(working copy)
> @@ -1,3 +1,4 @@
>  config CPU_VIA_C7
>  	bool
>  	select UDELAY_TSC
> +	select MMX

Are we sure all CPUs have MMX and SSE options set correctly? Are some
missing?


> Index: src/mainboard/iwill/dk8_htx/Makefile.inc
> ===================================================================
> --- src/mainboard/iwill/dk8_htx/Makefile.inc	(revision 5158)
> +++ src/mainboard/iwill/dk8_htx/Makefile.inc	(working copy)
> @@ -35,12 +35,6 @@
>  
>  initobj-y += crt0.o
>  # FIXME in $(top)/Makefile

I guess the FIXME comment can also be removed? Or does it refer to some
other lines? If no, please fix it in all files, there are multiple ones
with that comment.


> Index: src/mainboard/intel/eagleheights/Makefile.inc
> ===================================================================
> --- src/mainboard/intel/eagleheights/Makefile.inc	(revision 5158)
> +++ src/mainboard/intel/eagleheights/Makefile.inc	(working copy)
> @@ -10,13 +10,7 @@
>  
>  initobj-y += crt0.o
>  # FIXME in $(top)/Makefile
> -crt0s := $(src)/cpu/x86/16bit/entry16.inc
> -crt0s += $(src)/cpu/x86/32bit/entry32.inc
> -crt0s += $(src)/cpu/x86/16bit/reset16.inc
> -crt0s += $(src)/arch/i386/lib/id.inc

>  # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
> -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc

This comment is now in the wrong place.


> +# who else could use this?
> +ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
> +crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
> +endif

Hm, in theory hopefully more Intel boards which use romcc now. Or is the
CAR file not generic enough (i.e. specific to the S2735 or its
CPU/chipset?)


Uwe.
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