[coreboot] [commit] r6224 - in trunk/src/northbridge/amd: gx2 lx

[repository service]

Author: stepan
Date: Thu Dec 30 20:21:08 2010
New Revision: 6224
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6224

Log:
Use die()  to assure the processor can't wake up from an interrupt.

Signed-off-by: Nils Jacobs <njacobs8 at hetnet.nl>
Acked-by: Stefan Reinauer <stepan at coreboot.org>

Modified:
   trunk/src/northbridge/amd/gx2/pll_reset.c
   trunk/src/northbridge/amd/lx/pll_reset.c

Modified: trunk/src/northbridge/amd/gx2/pll_reset.c
==============================================================================
--- trunk/src/northbridge/amd/gx2/pll_reset.c	Thu Dec 30 18:39:50 2010	(r6223)
+++ trunk/src/northbridge/amd/gx2/pll_reset.c	Thu Dec 30 20:21:08 2010	(r6224)
@@ -78,9 +78,8 @@
 	} else if (CONFIG_GX2_PROCESSOR_MHZ == 300) {
 		DEFAULT_FBDIV = 18;
 	} else {
-		printk(BIOS_ERR, "Unsupported GX2_PROCESSOR_MHZ setting!\n");
 		post_code(POST_PLL_CPU_VER_FAIL);
-		__asm__ __volatile__("hlt\n");
+		die("Unsupported GX2_PROCESSOR_MHZ setting!\n");
 	}
 
 	/* clear the Bypass bit */
@@ -186,7 +185,7 @@
 
 		/* You should never get here..... The chip has reset. */
 		post_code(POST_PLL_RESET_FAIL);
-		while (1);
+		die("CONFIGURING PLL FAILURE\n");
 
 	} /* we haven't configured the PLL; do it now */
 

Modified: trunk/src/northbridge/amd/lx/pll_reset.c
==============================================================================
--- trunk/src/northbridge/amd/lx/pll_reset.c	Thu Dec 30 18:39:50 2010	(r6223)
+++ trunk/src/northbridge/amd/lx/pll_reset.c	Thu Dec 30 20:21:08 2010	(r6224)
@@ -59,9 +59,8 @@
 		wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
 
 		/* You should never get here..... The chip has reset. */
-		printk(BIOS_ERR, "CONFIGURING PLL FAILURE\n");
 		post_code(POST_PLL_RESET_FAIL);
-		__asm__ __volatile__("hlt\n");
+		die("CONFIGURING PLL FAILURE\n");
 
 	}
 	printk(BIOS_DEBUG, "PLL configured.\n");