[coreboot] 440BX - DFI P2XBL - Which Target?

Roger rogerx.oss at gmail.com
Thu Dec 30 09:01:37 CET 2010


I've got Boot!  ... But ...

Using the ASUS P2B only on a warm boot, and I deselected some Run non-VGA
option Roms:

[*] Run VGA option ROMs
[ ] Run non-VGA option ROMs

I'm attaching the warmboot log, and then a cold boot log (again, the cold boot
fails at raminit).  (I'm also attaching .config for kicks for anybody browsing
the lists.)

When I'm booted, I get a constant reboot after loading SeaBIOS.  Pressing F12
quickly doesn't show any boot options.  Likely because I've disabled the "Run
non-VGA option ROMs"?


Think I'll take a break for the night and read a few of the "Intel® 64 and
IA-32 Architectures Software Developer's Manuals" hosted at:
http://www.intel.com/products/processor/manuals/

(From what Keith just wrote just prior to this email, I need to read some raminit
code comments and get some memory stick config dumps.)

-- 
Roger
http://rogerx.freeshell.org/
-------------- next part --------------
CPU Mhz=451
No apic - only the main cpu is present.
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version 0.6.1-20100913_130029-morn.localdomain)

UHCI init on dev 00:07.2 (io=1080)
Found 0 lpt ports
Found 3 serial ports
ATA controller 0 at 1f0/3f4/0 (irq 14 dev 39)
ATA controller 1 at 170/374/0 (irq 15 dev 39)
ebda moved from 9fc00 to 9f800
USB mouse initialized
USB keyboard initialized
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at cf00:0003
Running option rom at d000:0003
Press F12 for boot menu.

Returned 57344 bytes of ZoneHigh
e820 map has 5 items:
  0: 0000000000000000 - 000000000009f800 = 1
  1: 000000000009f800 - 00000000000a0000 = 2
  2: 00000000000f0000 - 0000000000100000 = 2
  3: 0000000000100000 - 0000000000ffe000 = 1
  4: 0000000000ffe000 - 0000000001000000 = 2
enter handle_19:
  NULL
Booting from Floppy...
Boot failed: could not read the boot disk



coreboot-4.0-r6221 Wed Dec 29 22:22:50 AKST 2010 starting...

DIMM 0: 50
00: 80 08 04 0c 0a 01 40 00 01 80 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 30 20
20: 20 10 20 10 ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 da
40: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 64 f7
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 09 02 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 32 10
20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 88
40: 7f d0 00 00 00 00 00 00 ff 44 4d 31 36 36 35 56
50: 53 36 35 38 30 34 58 31 30 32 47 ff ff ff ff ff
60: ff ff ff 4d 45 4d 4f 52 59 20 43 41 52 44 20 54
70: 45 43 48 4e 4f 4c 4f 47 59 20 55 53 41 20 64 f6
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 01 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 04 01 01 00 0e 00 00 00 00 14 14 14 32 20
20: 20 10 20 10 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 14
40: 7f 7f 98 ff ff ff ff ff 49 33 30 30 30 30 39 32
50: 36 2d 30 30 20 20 20 20 20 20 20 41 20 30 36 32
60: 31 30 30 20 53 4f 55 54 48 4c 41 4e 44 20 4d 49
70: 43 52 4f 20 53 59 53 54 45 4d 53 20 30 32 64 a4
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: bad device

Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
PGPOL[BPR] has been set to 0x1d
RPS has been set to 0x0252
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
    Enabling refresh (DRAMC = 0x09) for DIMM 00
    Enabling refresh (DRAMC = 0x09) for DIMM 01
    Enabling refresh (DRAMC = 0x09) for DIMM 02
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00


coreboot-4.0-r6221 Wed Dec 29 22:22:50 AKST 2010 starting...

DIMM 0: 50
00: 80 08 04 0c 0a 01 40 00 01 80 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 30 20
20: 20 10 20 10 ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 da
40: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 64 f7
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 09 02 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 32 10
20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 88
40: 7f d0 00 00 00 00 00 00 ff 44 4d 31 36 36 35 56
50: 53 36 35 38 30 34 58 31 30 32 47 ff ff ff ff ff
60: ff ff ff 4d 45 4d 4f 52 59 20 43 41 52 44 20 54
70: 45 43 48 4e 4f 4c 4f 47 59 20 55 53 41 20 64 f6
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 01 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 04 01 01 00 0e 00 00 00 00 14 14 14 32 20
20: 20 10 20 10 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 14
40: 7f 7f 98 ff ff ff ff ff 49 33 30 30 30 30 39 32
50: 36 2d 30 30 20 20 20 20 20 20 20 41 20 30 36 32
60: 31 30 30 20 53 4f 55 54 48 4c 41 4e 44 20 4d 49
70: 43 52 4f 20 53 59 53 54 45 4d 53 20 30 32 64 a4
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: bad device

Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
PGPOL[BPR] has been set to 0x1d
RPS has been set to 0x0252
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
    Enabling refresh (DRAMC = 0x09) for DIMM 00
    Enabling refresh (DRAMC = 0x09) for DIMM 01
    Enabling refresh (DRAMC = 0x09) for DIMM 02
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 3436 + align -> fffc3480
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
coreboot-4.0-r6221 Wed Dec 29 22:22:50 AKST 2010 booting...
clocks_per_usec: 452
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PNP: 03f0.0: enabled 1
PNP: 03f0.1: enabled 1
PNP: 03f0.2: enabled 1
PNP: 03f0.3: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.9: enabled 1
PNP: 03f0.a: enabled 1
PCI: 00:04.1: enabled 1
PCI: 00:04.2: enabled 1
PCI: 00:04.3: enabled 1
Compare with tree...
Root Device: enabled 1
 APIC_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 PCI_DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:04.0: enabled 1
   PNP: 03f0.0: enabled 1
   PNP: 03f0.1: enabled 1
   PNP: 03f0.2: enabled 1
   PNP: 03f0.3: enabled 1
   PNP: 03f0.5: enabled 1
   PNP: 03f0.7: enabled 1
   PNP: 03f0.8: enabled 1
   PNP: 03f0.9: enabled 1
   PNP: 03f0.a: enabled 1
  PCI: 00:04.1: enabled 1
  PCI: 00:04.2: enabled 1
  PCI: 00:04.3: enabled 1
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: Static device PCI: 00:04.0 not found, disabling it.
PCI: Static device PCI: 00:04.1 not found, disabling it.
PCI: Static device PCI: 00:04.2 not found, disabling it.
PCI: Static device PCI: 00:04.3 not found, disabling it.
malloc Enter, size 68, free_mem_ptr 00130000
malloc 00130000
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
malloc Enter, size 68, free_mem_ptr 00130044
malloc 00130044
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
malloc Enter, size 68, free_mem_ptr 00130088
malloc 00130088
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] enabled
malloc Enter, size 68, free_mem_ptr 001300cc
malloc 001300cc
PCI: 00:07.3 [8086/7113] bus ops
PCI: 00:07.3 [8086/7113] enabled
malloc Enter, size 68, free_mem_ptr 00130110
malloc 00130110
PCI: 00:0b.0 [1102/0002] enabled
malloc Enter, size 68, free_mem_ptr 00130154
malloc 00130154
PCI: 00:0b.1 [1102/7002] enabled
malloc Enter, size 68, free_mem_ptr 00130198
malloc 00130198
PCI: 00:0d.0 [8086/1229] enabled
malloc Enter, size 68, free_mem_ptr 001301dc
malloc 001301dc
PCI: 00:0f.0 [105a/4d30] enabled
do_pci_scan_bridge for PCI: 00:01.0
malloc Enter, size 24, free_mem_ptr 00130220
malloc 00130220
PCI: pci_scan_bus for bus 01
malloc Enter, size 68, free_mem_ptr 00130238
malloc 00130238
PCI: 01:00.0 [10de/0253] enabled
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.3
scan_static_bus for PCI: 00:07.3 done
PCI: pci_scan_bus returning with max=001
scan_static_bus for Root Device done
done
Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
malloc Enter, size 2560, free_mem_ptr 0013027c
malloc 0013027c
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 child on link 0 PCI: 01:00.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
    PCI: 01:00.0 resource base 0 size 8000000 align 27 gran 27 limit ffffffff flags 1200 index 14
    PCI: 01:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 1200 index 18
    PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
   PCI: 00:04.0 child on link 0 PNP: 03f0.0
    PNP: 03f0.0
    PNP: 03f0.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 03f0.1
    PNP: 03f0.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.2
    PNP: 03f0.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.3
    PNP: 03f0.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5
    PNP: 03f0.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 03f0.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 03f0.7
    PNP: 03f0.8
    PNP: 03f0.9
    PNP: 03f0.a
   PCI: 00:04.1
   PCI: 00:04.2
   PCI: 00:04.3
   PCI: 00:07.0
   PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
   PCI: 00:07.1
   PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:07.2
   PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:07.3
   PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
   PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
   PCI: 00:0b.0
   PCI: 00:0b.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
   PCI: 00:0b.1
   PCI: 00:0b.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:0d.0
   PCI: 00:0d.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:0d.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 14
   PCI: 00:0d.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
   PCI: 00:0d.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 2200 index 30
   PCI: 00:0f.0
   PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:0f.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:0f.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 24
   PCI: 00:0f.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:0d.0 14 *  [0x0 - 0x3f] io
PCI: 00:0f.0 20 *  [0x40 - 0x7f] io
PCI: 00:07.2 20 *  [0x80 - 0x9f] io
PCI: 00:0b.0 10 *  [0xa0 - 0xbf] io
PCI: 00:07.1 20 *  [0xc0 - 0xcf] io
PCI: 00:0b.1 10 *  [0xd0 - 0xd7] io
PCI: 00:0f.0 10 *  [0xd8 - 0xdf] io
PCI: 00:0f.0 18 *  [0xe0 - 0xe7] io
PCI: 00:0f.0 14 *  [0xe8 - 0xeb] io
PCI: 00:0f.0 1c *  [0xec - 0xef] io
PCI_DOMAIN: 0000 compute_resources_io: base: f0 size: f0 align: 6 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 14 *  [0x0 - 0x7ffffff] prefmem
PCI: 01:00.0 18 *  [0x8000000 - 0x807ffff] prefmem
PCI: 00:01.0 compute_resources_prefmem: base: 8080000 size: 8100000 align: 27 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0xffffff] mem
PCI: 01:00.0 30 *  [0x1000000 - 0x101ffff] mem
PCI: 00:01.0 compute_resources_mem: base: 1020000 size: 1100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:01.0 24 *  [0x0 - 0x80fffff] prefmem
PCI: 00:00.0 10 *  [0xc000000 - 0xfffffff] prefmem
PCI: 00:01.0 20 *  [0x10000000 - 0x110fffff] mem
PCI: 00:0d.0 18 *  [0x11100000 - 0x111fffff] mem
PCI: 00:0d.0 30 *  [0x11200000 - 0x112fffff] mem
PCI: 00:0f.0 24 *  [0x11300000 - 0x1131ffff] mem
PCI: 00:0f.0 30 *  [0x11320000 - 0x1132ffff] mem
PCI: 00:0d.0 10 *  [0x11330000 - 0x11330fff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 11331000 size: 11331000 align: 27 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:07.0
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:07.2
constrain_resources: PCI: 00:07.3
constrain_resources: PCI: 00:0b.0
constrain_resources: PCI: 00:0b.1
constrain_resources: PCI: 00:0d.0
constrain_resources: PCI: 00:0f.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
        lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
        lim->base 00000000 lim->limit ff7fffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:f0 align:6 gran:0 limit:e3ff
Assigned: PCI: 00:0d.0 14 *  [0x1000 - 0x103f] io
Assigned: PCI: 00:0f.0 20 *  [0x1040 - 0x107f] io
Assigned: PCI: 00:07.2 20 *  [0x1080 - 0x109f] io
Assigned: PCI: 00:0b.0 10 *  [0x10a0 - 0x10bf] io
Assigned: PCI: 00:07.1 20 *  [0x10c0 - 0x10cf] io
Assigned: PCI: 00:0b.1 10 *  [0x10d0 - 0x10d7] io
Assigned: PCI: 00:0f.0 10 *  [0x10d8 - 0x10df] io
Assigned: PCI: 00:0f.0 18 *  [0x10e0 - 0x10e7] io
Assigned: PCI: 00:0f.0 14 *  [0x10e8 - 0x10eb] io
Assigned: PCI: 00:0f.0 1c *  [0x10ec - 0x10ef] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 10f0 size: f0 align: 6 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:e8000000 size:11331000 align:27 gran:0 limit:ff7fffff
Assigned: PCI: 00:01.0 24 *  [0xe8000000 - 0xf00fffff] prefmem
Assigned: PCI: 00:00.0 10 *  [0xf4000000 - 0xf7ffffff] prefmem
Assigned: PCI: 00:01.0 20 *  [0xf8000000 - 0xf90fffff] mem
Assigned: PCI: 00:0d.0 18 *  [0xf9100000 - 0xf91fffff] mem
Assigned: PCI: 00:0d.0 30 *  [0xf9200000 - 0xf92fffff] mem
Assigned: PCI: 00:0f.0 24 *  [0xf9300000 - 0xf931ffff] mem
Assigned: PCI: 00:0f.0 30 *  [0xf9320000 - 0xf932ffff] mem
Assigned: PCI: 00:0d.0 10 *  [0xf9330000 - 0xf9330fff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f9331000 size: 11331000 align: 27 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:e8000000 size:8100000 align:27 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 14 *  [0xe8000000 - 0xefffffff] prefmem
Assigned: PCI: 01:00.0 18 *  [0xf0000000 - 0xf007ffff] prefmem
PCI: 00:01.0 allocate_resources_prefmem: next_base: f0080000 size: 8100000 align: 27 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:f8000000 size:1100000 align:24 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 10 *  [0xf8000000 - 0xf8ffffff] mem
Assigned: PCI: 01:00.0 30 *  [0xf9000000 - 0xf901ffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: f9020000 size: 1100000 align: 24 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 384 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00e8000000 - 0x00f00fffff] size 0x08100000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f8000000 - 0x00f90fffff] size 0x01100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00e8000000 - 0x00efffffff] size 0x08000000 gran 0x1b prefmem
PCI: 01:00.0 18 <- [0x00f0000000 - 0x00f007ffff] size 0x00080000 gran 0x13 prefmem
PCI: 01:00.0 30 <- [0x00f9000000 - 0x00f901ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.1 20 <- [0x00000010c0 - 0x00000010cf] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001080 - 0x000000109f] size 0x00000020 gran 0x05 io
PCI: 00:0b.0 10 <- [0x00000010a0 - 0x00000010bf] size 0x00000020 gran 0x05 io
PCI: 00:0b.1 10 <- [0x00000010d0 - 0x00000010d7] size 0x00000008 gran 0x03 io
PCI: 00:0d.0 10 <- [0x00f9330000 - 0x00f9330fff] size 0x00001000 gran 0x0c mem
PCI: 00:0d.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:0d.0 18 <- [0x00f9100000 - 0x00f91fffff] size 0x00100000 gran 0x14 mem
PCI: 00:0d.0 30 <- [0x00f9200000 - 0x00f92fffff] size 0x00100000 gran 0x14 romem
PCI: 00:0f.0 10 <- [0x00000010d8 - 0x00000010df] size 0x00000008 gran 0x03 io
PCI: 00:0f.0 14 <- [0x00000010e8 - 0x00000010eb] size 0x00000004 gran 0x02 io
PCI: 00:0f.0 18 <- [0x00000010e0 - 0x00000010e7] size 0x00000008 gran 0x03 io
PCI: 00:0f.0 1c <- [0x00000010ec - 0x00000010ef] size 0x00000004 gran 0x02 io
PCI: 00:0f.0 20 <- [0x0000001040 - 0x000000107f] size 0x00000040 gran 0x06 io
PCI: 00:0f.0 24 <- [0x00f9300000 - 0x00f931ffff] size 0x00020000 gran 0x11 mem
PCI: 00:0f.0 30 <- [0x00f9320000 - 0x00f932ffff] size 0x00010000 gran 0x10 romem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 1000 size f0 align 6 gran 0 limit e3ff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base e8000000 size 11331000 align 27 gran 0 limit ff7fffff flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
  PCI_DOMAIN: 0000 resource base c0000 size 17f40000 align 0 gran 0 limit 0 flags e0004200 index b
   PCI: 00:00.0
   PCI: 00:00.0 resource base f4000000 size 4000000 align 26 gran 26 limit ff7fffff flags 60001200 index 10
   PCI: 00:01.0 child on link 0 PCI: 01:00.0
   PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
   PCI: 00:01.0 resource base e8000000 size 8100000 align 27 gran 20 limit ff7fffff flags 60081202 index 24
   PCI: 00:01.0 resource base f8000000 size 1100000 align 24 gran 20 limit ff7fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base f8000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 10
    PCI: 01:00.0 resource base e8000000 size 8000000 align 27 gran 27 limit ff7fffff flags 60001200 index 14
    PCI: 01:00.0 resource base f0000000 size 80000 align 19 gran 19 limit ff7fffff flags 60001200 index 18
    PCI: 01:00.0 resource base f9000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30
   PCI: 00:04.0 child on link 0 PNP: 03f0.0
    PNP: 03f0.0
    PNP: 03f0.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 03f0.1
    PNP: 03f0.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.2
    PNP: 03f0.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.3
    PNP: 03f0.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5
    PNP: 03f0.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 03f0.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 03f0.7
    PNP: 03f0.8
    PNP: 03f0.9
    PNP: 03f0.a
   PCI: 00:04.1
   PCI: 00:04.2
   PCI: 00:04.3
   PCI: 00:07.0
   PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
   PCI: 00:07.1
   PCI: 00:07.1 resource base 10c0 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
   PCI: 00:07.2
   PCI: 00:07.2 resource base 1080 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
   PCI: 00:07.3
   PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
   PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
   PCI: 00:0b.0
   PCI: 00:0b.0 resource base 10a0 size 20 align 5 gran 5 limit e3ff flags 60000100 index 10
   PCI: 00:0b.1
   PCI: 00:0b.1 resource base 10d0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
   PCI: 00:0d.0
   PCI: 00:0d.0 resource base f9330000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
   PCI: 00:0d.0 resource base 1000 size 40 align 6 gran 6 limit e3ff flags 60000100 index 14
   PCI: 00:0d.0 resource base f9100000 size 100000 align 20 gran 20 limit ff7fffff flags 60000200 index 18
   PCI: 00:0d.0 resource base f9200000 size 100000 align 20 gran 20 limit ff7fffff flags 60002200 index 30
   PCI: 00:0f.0
   PCI: 00:0f.0 resource base 10d8 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
   PCI: 00:0f.0 resource base 10e8 size 4 align 2 gran 2 limit e3ff flags 60000100 index 14
   PCI: 00:0f.0 resource base 10e0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 18
   PCI: 00:0f.0 resource base 10ec size 4 align 2 gran 2 limit e3ff flags 60000100 index 1c
   PCI: 00:0f.0 resource base 1040 size 40 align 6 gran 6 limit e3ff flags 60000100 index 20
   PCI: 00:0f.0 resource base f9300000 size 20000 align 17 gran 17 limit ff7fffff flags 60000200 index 24
   PCI: 00:0f.0 resource base f9320000 size 10000 align 16 gran 16 limit ff7fffff flags 60002200 index 30
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 008b
PCI: 00:01.0 cmd <- 107
PCI: 00:07.0 cmd <- 0f
PCI: 00:07.1 cmd <- 05
PCI: 00:07.2 cmd <- 05
PCI: 00:07.3 cmd <- 03
PCI: 00:0b.0 cmd <- 05
PCI: 00:0b.1 cmd <- 05
PCI: 00:0d.0 cmd <- 03
PCI: 00:0f.0 cmd <- 07
PCI: 01:00.0 cmd <- 07
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00130c7c
malloc 00130c7c
Initializing CPU #0
CPU: vendor Intel device 673
CPU: family 06, model 07, stepping 03
microcode_info: sig = 0x00000673 pf=0x00000001 rev = 0x0000000e
microcode updated to revision: 0000000e from revision 0000000e
Enabling cache

Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base:    0MB, range:  256MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 1, base:  256MB, range:  128MB, type WB
ADDRESS_MASK_HIGH=0xf
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Disabling local apic...done.
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: off
IDE: Secondary IDE interface: off
PCI: 00:07.2 init
PCI: 00:0b.0 init
PCI: 00:0b.1 init
PCI: 00:0d.0 init
PCI: 00:0f.0 init
PCI: 01:00.0 init
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 3436 + align -> fffc3480
Check fallback/coreboot_ram
CBFS: follow chain: fffc3480 + 38 + 1523d + align -> fffd8700
Check fallback/payload
CBFS: follow chain: fffd8700 + 38 + b5d8 + align -> fffe3d40
Check
CBFS: follow chain: fffe3d40 + 28 + 1bf36 + align -> fffffcc0
CBFS:  Could not find file pci10de,0253.rom
On card, ROM address for PCI: 01:00.0 = f9000000
PCI expansion ROM, signature 0xaa55, INIT size 0xf000, data ptr 0x0104
PCI ROM image, vendor ID 10de, device ID 0253,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f9000000 to 0xc0000, 0xf000 bytes
Real mode stub @00000600: 606 bytes
Calling Option ROM...
Oops, exception 8 while executing option rom
... Option ROM returned.
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 0
PNP: 03f0.0: enabled 1
PNP: 03f0.1: enabled 1
PNP: 03f0.2: enabled 1
PNP: 03f0.3: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.9: enabled 1
PNP: 03f0.a: enabled 1
PCI: 00:04.1: enabled 0
PCI: 00:04.2: enabled 0
PCI: 00:04.3: enabled 0
PCI: 00:07.0: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0b.1: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:0f.0: enabled 1
PCI: 01:00.0: enabled 1
CPU: 00: enabled 1
Initializing CBMEM area to 0x17ff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 17ff0200...ok
High Tables Base is 17ff0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Verifying copy of Interrupt Routing Table at 0x000f0000... done
Checking Interrupt Routing Table consistency...
check_pirq_routing_table(): Interrupt Routing Table located at 000f0000.
done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x17ff0400... done.
Verifying copy of Interrupt Routing Table at 0x17ff0400... done
Checking Interrupt Routing Table consistency...
check_pirq_routing_table(): Interrupt Routing Table located at 17ff0400.
done.
PIRQ table: 128 bytes.
Adding CBMEM entry as no. 3
ACPI: Writing ACPI tables at 17ff1400...
ACPI:     * FACS
ACPI:     * DSDT @ 17ff1540 Length 61d
ACPI:     * FADT
ACPI: added table 1/32, length now 40
ACPI:    * MADT
ACPI:    * SSDT
Found 1 CPU(s).
ACPI: added table 2/32, length now 44
ACPI: done.
ACPI tables: 2252 bytes.
Adding CBMEM entry as no. 4
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum 17df
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x17ffd000
rom_table_end = 0x17ffd000
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x17ffd000 to 0x18000000
Adding high table area
coreboot memory table:
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-0000000017feffff: RAM
 3. 0000000017ff0000-0000000017ffffff: CONFIGURATION TABLES
 4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 17ffd000 - 17ffd1ac  checksum cf3c
coreboot table: 428 bytes.
Multiboot Information structure has been written.
 0. FREE SPACE 17fff000 00001000
 1. GDT        17ff0200 00000200
 2. IRQ TABLE  17ff0400 00001000
 3. ACPI       17ff1400 0000bc00
 4. COREBOOT   17ffd000 00002000
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 3436 + align -> fffc3480
Check fallback/coreboot_ram
CBFS: follow chain: fffc3480 + 38 + 1523d + align -> fffd8700
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffd8738
  data (compression=1)
malloc Enter, size 36, free_mem_ptr 00130cc0
malloc 00130cc0
  New segment dstaddr 0xe93f0 memsize 0x16c10 srcaddr 0xfffd8770 filesize 0xb5a0
  (cleaned up) New segment addr 0xe93f0 size 0x16c10 offset 0xfffd8770 filesize 0xb5a0
Loading segment from rom address 0xfffd8754
  Entry Point 0x000fc8c6
Loading Segment: addr: 0x00000000000e93f0 memsz: 0x0000000000016c10 filesz: 0x000000000000b5a0
lb: [0x0000000000100000, 0x0000000000134000)
Post relocation: addr: 0x00000000000e93f0 memsz: 0x0000000000016c10 filesz: 0x000000000000b5a0
using LZMA
[ 0x000e93f0, 00100000, 0x00100000) <- fffd8770
dest 000e93f0, end 00100000, bouncebuffer 17f88000
Loaded segments
Jumping to boot code at fc8c6
entry    = 0x000fc8c6
lb_start = 0x00100000
lb_size  = 0x00034000
adjust   = 0x17ebc000
buffer   = 0x17f88000
     elf_boot_notes = 0x00125c60
adjusted_boot_notes = 0x17fe1c60
Start bios (version 0.6.1-20100913_130029-morn.localdomain)
Unable to find coreboot table!
Found CBFS header at 0xfffffc9e
Ram Size=0x01000000 (0x0000000000000000 high)
CPU Mhz=451
No apic - only the main cpu is present.
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version 0.6.1-20100913_130029-morn.localdomain)

UHCI init on dev 00:07.2 (io=1080)
Found 0 lpt ports
Found 3 serial ports
ATA controller 0 at 1f0/3f4/0 (irq 14 dev 39)
ATA controller 1 at 170/374/0 (irq 15 dev 39)
ebda moved from 9fc00 to 9f800
USB mouse initialized
USB keyboard initialized
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at cf00:0003
Running option rom at d000:0003
Press F12 for boot menu.

Select boot device:

-------------- next part --------------
CPU Mhz=451
No apic - only the main cpu is present.
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version 0.6.1-20100913_130029-morn.localdomain)

UHCI init on dev 00:07.2 (io=1080)
Found 0 lpt ports
Found 3 serial ports
ATA controller 0 at 1f0/3f4/0 (irq 14 dev 39)
ATA controller 1 at 170/374/0 (irq 15 dev 39)
ebda moved from 9fc00 to 9f800
USB mouse initialized
USB keyboard initialized
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at cf00:0003
Running option rom at d000:0003
Press F12 for boot menu.

Returned 57344 bytes of ZoneHigh
e820 map has 5 items:
  0: 0000000000000000 - 000000000009f800 = 1
  1: 000000000009f800 - 00000000000a0000 = 2
  2: 00000000000f0000 - 0000000000100000 = 2
  3: 0000000000100000 - 0000000000ffe000 = 1
  4: 0000000000ffe000 - 0000000001000000 = 2
enter handle_19:
  NULL
Booting from Floppy...
Boot failed: could not read the boot disk



coreboot-4.0-r6221 Wed Dec 29 22:22:50 AKST 2010 starting...

DIMM 0: 50
00: 80 08 04 0c 0a 01 40 00 01 80 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 30 20
20: 20 10 20 10 ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 da
40: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 64 f7
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 09 02 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 32 10
20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 88
40: 7f d0 00 00 00 00 00 00 ff 44 4d 31 36 36 35 56
50: 53 36 35 38 30 34 58 31 30 32 47 ff ff ff ff ff
60: ff ff ff 4d 45 4d 4f 52 59 20 43 41 52 44 20 54
70: 45 43 48 4e 4f 4c 4f 47 59 20 55 53 41 20 64 f6
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 01 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 04 01 01 00 0e 00 00 00 00 14 14 14 32 20
20: 20 10 20 10 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 14
40: 7f 7f 98 ff ff ff ff ff 49 33 30 30 30 30 39 32
50: 36 2d 30 30 20 20 20 20 20 20 20 41 20 30 36 32
60: 31 30 30 20 53 4f 55 54 48 4c 41 4e 44 20 4d 49
70: 43 52 4f 20 53 59 53 54 45 4d 53 20 30 32 64 a4
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: bad device

Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
PGPOL[BPR] has been set to 0x1d
RPS has been set to 0x0252
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
    Enabling refresh (DRAMC = 0x09) for DIMM 00
    Enabling refresh (DRAMC = 0x09) for DIMM 01
    Enabling refresh (DRAMC = 0x09) for DIMM 02
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00


coreboot-4.0-r6221 Wed Dec 29 22:22:50 AKST 2010 starting...

DIMM 0: 50
00: 80 08 04 0c 0a 01 40 00 01 80 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 30 20
20: 20 10 20 10 ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 da
40: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 64 f7
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 09 02 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 14 14 32 10
20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 12 88
40: 7f d0 00 00 00 00 00 00 ff 44 4d 31 36 36 35 56
50: 53 36 35 38 30 34 58 31 30 32 47 ff ff ff ff ff
60: ff ff ff 4d 45 4d 4f 52 59 20 43 41 52 44 20 54
70: 45 43 48 4e 4f 4c 4f 47 59 20 55 53 41 20 64 f6
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 01 40 00 01 a0 60 00 80 08 00 01
10: 8f 04 04 01 01 00 0e 00 00 00 00 14 14 14 32 20
20: 20 10 20 10 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 14
40: 7f 7f 98 ff ff ff ff ff 49 33 30 30 30 30 39 32
50: 36 2d 30 30 20 20 20 20 20 20 20 41 20 30 36 32
60: 31 30 30 20 53 4f 55 54 48 4c 41 4e 44 20 4d 49
70: 43 52 4f 20 53 59 53 54 45 4d 53 20 30 32 64 a4
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: bad device

Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
PGPOL[BPR] has been set to 0x1d
RPS has been set to 0x0252
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
    Enabling refresh (DRAMC = 0x09) for DIMM 00
    Enabling refresh (DRAMC = 0x09) for DIMM 01
    Enabling refresh (DRAMC = 0x09) for DIMM 02
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 10 18 20 30 30 30 30 00 ec 2b 00 a0 ba 00 00
70: 20 1f 0a 78 52 02 00 00 00 1d 10 38 10 00 00 00
80: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 98 88 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 9b 0e 20 10 00 00
c0: 00 00 00 00 00 00 00 00 18 0c e4 ff 5f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 4c ad ff bb 8a 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 3436 + align -> fffc3480
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
coreboot-4.0-r6221 Wed Dec 29 22:22:50 AKST 2010 booting...
clocks_per_usec: 452
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PNP: 03f0.0: enabled 1
PNP: 03f0.1: enabled 1
PNP: 03f0.2: enabled 1
PNP: 03f0.3: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.9: enabled 1
PNP: 03f0.a: enabled 1
PCI: 00:04.1: enabled 1
PCI: 00:04.2: enabled 1
PCI: 00:04.3: enabled 1
Compare with tree...
Root Device: enabled 1
 APIC_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 PCI_DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:04.0: enabled 1
   PNP: 03f0.0: enabled 1
   PNP: 03f0.1: enabled 1
   PNP: 03f0.2: enabled 1
   PNP: 03f0.3: enabled 1
   PNP: 03f0.5: enabled 1
   PNP: 03f0.7: enabled 1
   PNP: 03f0.8: enabled 1
   PNP: 03f0.9: enabled 1
   PNP: 03f0.a: enabled 1
  PCI: 00:04.1: enabled 1
  PCI: 00:04.2: enabled 1
  PCI: 00:04.3: enabled 1
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: Static device PCI: 00:04.0 not found, disabling it.
PCI: Static device PCI: 00:04.1 not found, disabling it.
PCI: Static device PCI: 00:04.2 not found, disabling it.
PCI: Static device PCI: 00:04.3 not found, disabling it.
malloc Enter, size 68, free_mem_ptr 00130000
malloc 00130000
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
malloc Enter, size 68, free_mem_ptr 00130044
malloc 00130044
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
malloc Enter, size 68, free_mem_ptr 00130088
malloc 00130088
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] enabled
malloc Enter, size 68, free_mem_ptr 001300cc
malloc 001300cc
PCI: 00:07.3 [8086/7113] bus ops
PCI: 00:07.3 [8086/7113] enabled
malloc Enter, size 68, free_mem_ptr 00130110
malloc 00130110
PCI: 00:0b.0 [1102/0002] enabled
malloc Enter, size 68, free_mem_ptr 00130154
malloc 00130154
PCI: 00:0b.1 [1102/7002] enabled
malloc Enter, size 68, free_mem_ptr 00130198
malloc 00130198
PCI: 00:0d.0 [8086/1229] enabled
malloc Enter, size 68, free_mem_ptr 001301dc
malloc 001301dc
PCI: 00:0f.0 [105a/4d30] enabled
do_pci_scan_bridge for PCI: 00:01.0
malloc Enter, size 24, free_mem_ptr 00130220
malloc 00130220
PCI: pci_scan_bus for bus 01
malloc Enter, size 68, free_mem_ptr 00130238
malloc 00130238
PCI: 01:00.0 [10de/0253] enabled
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.3
scan_static_bus for PCI: 00:07.3 done
PCI: pci_scan_bus returning with max=001
scan_static_bus for Root Device done
done
Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
malloc Enter, size 2560, free_mem_ptr 0013027c
malloc 0013027c
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 child on link 0 PCI: 01:00.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
    PCI: 01:00.0 resource base 0 size 8000000 align 27 gran 27 limit ffffffff flags 1200 index 14
    PCI: 01:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 1200 index 18
    PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
   PCI: 00:04.0 child on link 0 PNP: 03f0.0
    PNP: 03f0.0
    PNP: 03f0.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 03f0.1
    PNP: 03f0.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.2
    PNP: 03f0.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.3
    PNP: 03f0.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5
    PNP: 03f0.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 03f0.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 03f0.7
    PNP: 03f0.8
    PNP: 03f0.9
    PNP: 03f0.a
   PCI: 00:04.1
   PCI: 00:04.2
   PCI: 00:04.3
   PCI: 00:07.0
   PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
   PCI: 00:07.1
   PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:07.2
   PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:07.3
   PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
   PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
   PCI: 00:0b.0
   PCI: 00:0b.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
   PCI: 00:0b.1
   PCI: 00:0b.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:0d.0
   PCI: 00:0d.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:0d.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 14
   PCI: 00:0d.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
   PCI: 00:0d.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 2200 index 30
   PCI: 00:0f.0
   PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:0f.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:0f.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 24
   PCI: 00:0f.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:0d.0 14 *  [0x0 - 0x3f] io
PCI: 00:0f.0 20 *  [0x40 - 0x7f] io
PCI: 00:07.2 20 *  [0x80 - 0x9f] io
PCI: 00:0b.0 10 *  [0xa0 - 0xbf] io
PCI: 00:07.1 20 *  [0xc0 - 0xcf] io
PCI: 00:0b.1 10 *  [0xd0 - 0xd7] io
PCI: 00:0f.0 10 *  [0xd8 - 0xdf] io
PCI: 00:0f.0 18 *  [0xe0 - 0xe7] io
PCI: 00:0f.0 14 *  [0xe8 - 0xeb] io
PCI: 00:0f.0 1c *  [0xec - 0xef] io
PCI_DOMAIN: 0000 compute_resources_io: base: f0 size: f0 align: 6 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 14 *  [0x0 - 0x7ffffff] prefmem
PCI: 01:00.0 18 *  [0x8000000 - 0x807ffff] prefmem
PCI: 00:01.0 compute_resources_prefmem: base: 8080000 size: 8100000 align: 27 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0xffffff] mem
PCI: 01:00.0 30 *  [0x1000000 - 0x101ffff] mem
PCI: 00:01.0 compute_resources_mem: base: 1020000 size: 1100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:01.0 24 *  [0x0 - 0x80fffff] prefmem
PCI: 00:00.0 10 *  [0xc000000 - 0xfffffff] prefmem
PCI: 00:01.0 20 *  [0x10000000 - 0x110fffff] mem
PCI: 00:0d.0 18 *  [0x11100000 - 0x111fffff] mem
PCI: 00:0d.0 30 *  [0x11200000 - 0x112fffff] mem
PCI: 00:0f.0 24 *  [0x11300000 - 0x1131ffff] mem
PCI: 00:0f.0 30 *  [0x11320000 - 0x1132ffff] mem
PCI: 00:0d.0 10 *  [0x11330000 - 0x11330fff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 11331000 size: 11331000 align: 27 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:07.0
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:07.2
constrain_resources: PCI: 00:07.3
constrain_resources: PCI: 00:0b.0
constrain_resources: PCI: 00:0b.1
constrain_resources: PCI: 00:0d.0
constrain_resources: PCI: 00:0f.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
        lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
        lim->base 00000000 lim->limit ff7fffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:f0 align:6 gran:0 limit:e3ff
Assigned: PCI: 00:0d.0 14 *  [0x1000 - 0x103f] io
Assigned: PCI: 00:0f.0 20 *  [0x1040 - 0x107f] io
Assigned: PCI: 00:07.2 20 *  [0x1080 - 0x109f] io
Assigned: PCI: 00:0b.0 10 *  [0x10a0 - 0x10bf] io
Assigned: PCI: 00:07.1 20 *  [0x10c0 - 0x10cf] io
Assigned: PCI: 00:0b.1 10 *  [0x10d0 - 0x10d7] io
Assigned: PCI: 00:0f.0 10 *  [0x10d8 - 0x10df] io
Assigned: PCI: 00:0f.0 18 *  [0x10e0 - 0x10e7] io
Assigned: PCI: 00:0f.0 14 *  [0x10e8 - 0x10eb] io
Assigned: PCI: 00:0f.0 1c *  [0x10ec - 0x10ef] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 10f0 size: f0 align: 6 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:e8000000 size:11331000 align:27 gran:0 limit:ff7fffff
Assigned: PCI: 00:01.0 24 *  [0xe8000000 - 0xf00fffff] prefmem
Assigned: PCI: 00:00.0 10 *  [0xf4000000 - 0xf7ffffff] prefmem
Assigned: PCI: 00:01.0 20 *  [0xf8000000 - 0xf90fffff] mem
Assigned: PCI: 00:0d.0 18 *  [0xf9100000 - 0xf91fffff] mem
Assigned: PCI: 00:0d.0 30 *  [0xf9200000 - 0xf92fffff] mem
Assigned: PCI: 00:0f.0 24 *  [0xf9300000 - 0xf931ffff] mem
Assigned: PCI: 00:0f.0 30 *  [0xf9320000 - 0xf932ffff] mem
Assigned: PCI: 00:0d.0 10 *  [0xf9330000 - 0xf9330fff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f9331000 size: 11331000 align: 27 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:e8000000 size:8100000 align:27 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 14 *  [0xe8000000 - 0xefffffff] prefmem
Assigned: PCI: 01:00.0 18 *  [0xf0000000 - 0xf007ffff] prefmem
PCI: 00:01.0 allocate_resources_prefmem: next_base: f0080000 size: 8100000 align: 27 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:f8000000 size:1100000 align:24 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 10 *  [0xf8000000 - 0xf8ffffff] mem
Assigned: PCI: 01:00.0 30 *  [0xf9000000 - 0xf901ffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: f9020000 size: 1100000 align: 24 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 384 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00e8000000 - 0x00f00fffff] size 0x08100000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f8000000 - 0x00f90fffff] size 0x01100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00e8000000 - 0x00efffffff] size 0x08000000 gran 0x1b prefmem
PCI: 01:00.0 18 <- [0x00f0000000 - 0x00f007ffff] size 0x00080000 gran 0x13 prefmem
PCI: 01:00.0 30 <- [0x00f9000000 - 0x00f901ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.1 20 <- [0x00000010c0 - 0x00000010cf] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001080 - 0x000000109f] size 0x00000020 gran 0x05 io
PCI: 00:0b.0 10 <- [0x00000010a0 - 0x00000010bf] size 0x00000020 gran 0x05 io
PCI: 00:0b.1 10 <- [0x00000010d0 - 0x00000010d7] size 0x00000008 gran 0x03 io
PCI: 00:0d.0 10 <- [0x00f9330000 - 0x00f9330fff] size 0x00001000 gran 0x0c mem
PCI: 00:0d.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:0d.0 18 <- [0x00f9100000 - 0x00f91fffff] size 0x00100000 gran 0x14 mem
PCI: 00:0d.0 30 <- [0x00f9200000 - 0x00f92fffff] size 0x00100000 gran 0x14 romem
PCI: 00:0f.0 10 <- [0x00000010d8 - 0x00000010df] size 0x00000008 gran 0x03 io
PCI: 00:0f.0 14 <- [0x00000010e8 - 0x00000010eb] size 0x00000004 gran 0x02 io
PCI: 00:0f.0 18 <- [0x00000010e0 - 0x00000010e7] size 0x00000008 gran 0x03 io
PCI: 00:0f.0 1c <- [0x00000010ec - 0x00000010ef] size 0x00000004 gran 0x02 io
PCI: 00:0f.0 20 <- [0x0000001040 - 0x000000107f] size 0x00000040 gran 0x06 io
PCI: 00:0f.0 24 <- [0x00f9300000 - 0x00f931ffff] size 0x00020000 gran 0x11 mem
PCI: 00:0f.0 30 <- [0x00f9320000 - 0x00f932ffff] size 0x00010000 gran 0x10 romem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 1000 size f0 align 6 gran 0 limit e3ff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base e8000000 size 11331000 align 27 gran 0 limit ff7fffff flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
  PCI_DOMAIN: 0000 resource base c0000 size 17f40000 align 0 gran 0 limit 0 flags e0004200 index b
   PCI: 00:00.0
   PCI: 00:00.0 resource base f4000000 size 4000000 align 26 gran 26 limit ff7fffff flags 60001200 index 10
   PCI: 00:01.0 child on link 0 PCI: 01:00.0
   PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
   PCI: 00:01.0 resource base e8000000 size 8100000 align 27 gran 20 limit ff7fffff flags 60081202 index 24
   PCI: 00:01.0 resource base f8000000 size 1100000 align 24 gran 20 limit ff7fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base f8000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 10
    PCI: 01:00.0 resource base e8000000 size 8000000 align 27 gran 27 limit ff7fffff flags 60001200 index 14
    PCI: 01:00.0 resource base f0000000 size 80000 align 19 gran 19 limit ff7fffff flags 60001200 index 18
    PCI: 01:00.0 resource base f9000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30
   PCI: 00:04.0 child on link 0 PNP: 03f0.0
    PNP: 03f0.0
    PNP: 03f0.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 03f0.1
    PNP: 03f0.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.2
    PNP: 03f0.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.3
    PNP: 03f0.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5
    PNP: 03f0.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 03f0.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 03f0.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 03f0.7
    PNP: 03f0.8
    PNP: 03f0.9
    PNP: 03f0.a
   PCI: 00:04.1
   PCI: 00:04.2
   PCI: 00:04.3
   PCI: 00:07.0
   PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
   PCI: 00:07.1
   PCI: 00:07.1 resource base 10c0 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
   PCI: 00:07.2
   PCI: 00:07.2 resource base 1080 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
   PCI: 00:07.3
   PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
   PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
   PCI: 00:0b.0
   PCI: 00:0b.0 resource base 10a0 size 20 align 5 gran 5 limit e3ff flags 60000100 index 10
   PCI: 00:0b.1
   PCI: 00:0b.1 resource base 10d0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
   PCI: 00:0d.0
   PCI: 00:0d.0 resource base f9330000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
   PCI: 00:0d.0 resource base 1000 size 40 align 6 gran 6 limit e3ff flags 60000100 index 14
   PCI: 00:0d.0 resource base f9100000 size 100000 align 20 gran 20 limit ff7fffff flags 60000200 index 18
   PCI: 00:0d.0 resource base f9200000 size 100000 align 20 gran 20 limit ff7fffff flags 60002200 index 30
   PCI: 00:0f.0
   PCI: 00:0f.0 resource base 10d8 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
   PCI: 00:0f.0 resource base 10e8 size 4 align 2 gran 2 limit e3ff flags 60000100 index 14
   PCI: 00:0f.0 resource base 10e0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 18
   PCI: 00:0f.0 resource base 10ec size 4 align 2 gran 2 limit e3ff flags 60000100 index 1c
   PCI: 00:0f.0 resource base 1040 size 40 align 6 gran 6 limit e3ff flags 60000100 index 20
   PCI: 00:0f.0 resource base f9300000 size 20000 align 17 gran 17 limit ff7fffff flags 60000200 index 24
   PCI: 00:0f.0 resource base f9320000 size 10000 align 16 gran 16 limit ff7fffff flags 60002200 index 30
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 008b
PCI: 00:01.0 cmd <- 107
PCI: 00:07.0 cmd <- 0f
PCI: 00:07.1 cmd <- 05
PCI: 00:07.2 cmd <- 05
PCI: 00:07.3 cmd <- 03
PCI: 00:0b.0 cmd <- 05
PCI: 00:0b.1 cmd <- 05
PCI: 00:0d.0 cmd <- 03
PCI: 00:0f.0 cmd <- 07
PCI: 01:00.0 cmd <- 07
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00130c7c
malloc 00130c7c
Initializing CPU #0
CPU: vendor Intel device 673
CPU: family 06, model 07, stepping 03
microcode_info: sig = 0x00000673 pf=0x00000001 rev = 0x0000000e
microcode updated to revision: 0000000e from revision 0000000e
Enabling cache

Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base:    0MB, range:  256MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 1, base:  256MB, range:  128MB, type WB
ADDRESS_MASK_HIGH=0xf
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Disabling local apic...done.
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: off
IDE: Secondary IDE interface: off
PCI: 00:07.2 init
PCI: 00:0b.0 init
PCI: 00:0b.1 init
PCI: 00:0d.0 init
PCI: 00:0f.0 init
PCI: 01:00.0 init
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 3436 + align -> fffc3480
Check fallback/coreboot_ram
CBFS: follow chain: fffc3480 + 38 + 1523d + align -> fffd8700
Check fallback/payload
CBFS: follow chain: fffd8700 + 38 + b5d8 + align -> fffe3d40
Check
CBFS: follow chain: fffe3d40 + 28 + 1bf36 + align -> fffffcc0
CBFS:  Could not find file pci10de,0253.rom
On card, ROM address for PCI: 01:00.0 = f9000000
PCI expansion ROM, signature 0xaa55, INIT size 0xf000, data ptr 0x0104
PCI ROM image, vendor ID 10de, device ID 0253,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f9000000 to 0xc0000, 0xf000 bytes
Real mode stub @00000600: 606 bytes
Calling Option ROM...
Oops, exception 8 while executing option rom
... Option ROM returned.
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 0
PNP: 03f0.0: enabled 1
PNP: 03f0.1: enabled 1
PNP: 03f0.2: enabled 1
PNP: 03f0.3: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.9: enabled 1
PNP: 03f0.a: enabled 1
PCI: 00:04.1: enabled 0
PCI: 00:04.2: enabled 0
PCI: 00:04.3: enabled 0
PCI: 00:07.0: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0b.1: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:0f.0: enabled 1
PCI: 01:00.0: enabled 1
CPU: 00: enabled 1
Initializing CBMEM area to 0x17ff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 17ff0200...ok
High Tables Base is 17ff0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Verifying copy of Interrupt Routing Table at 0x000f0000... done
Checking Interrupt Routing Table consistency...
check_pirq_routing_table(): Interrupt Routing Table located at 000f0000.
done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x17ff0400... done.
Verifying copy of Interrupt Routing Table at 0x17ff0400... done
Checking Interrupt Routing Table consistency...
check_pirq_routing_table(): Interrupt Routing Table located at 17ff0400.
done.
PIRQ table: 128 bytes.
Adding CBMEM entry as no. 3
ACPI: Writing ACPI tables at 17ff1400...
ACPI:     * FACS
ACPI:     * DSDT @ 17ff1540 Length 61d
ACPI:     * FADT
ACPI: added table 1/32, length now 40
ACPI:    * MADT
ACPI:    * SSDT
Found 1 CPU(s).
ACPI: added table 2/32, length now 44
ACPI: done.
ACPI tables: 2252 bytes.
Adding CBMEM entry as no. 4
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum 17df
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x17ffd000
rom_table_end = 0x17ffd000
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x17ffd000 to 0x18000000
Adding high table area
coreboot memory table:
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-0000000017feffff: RAM
 3. 0000000017ff0000-0000000017ffffff: CONFIGURATION TABLES
 4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 17ffd000 - 17ffd1ac  checksum cf3c
coreboot table: 428 bytes.
Multiboot Information structure has been written.
 0. FREE SPACE 17fff000 00001000
 1. GDT        17ff0200 00000200
 2. IRQ TABLE  17ff0400 00001000
 3. ACPI       17ff1400 0000bc00
 4. COREBOOT   17ffd000 00002000
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 3436 + align -> fffc3480
Check fallback/coreboot_ram
CBFS: follow chain: fffc3480 + 38 + 1523d + align -> fffd8700
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffd8738
  data (compression=1)
malloc Enter, size 36, free_mem_ptr 00130cc0
malloc 00130cc0
  New segment dstaddr 0xe93f0 memsize 0x16c10 srcaddr 0xfffd8770 filesize 0xb5a0
  (cleaned up) New segment addr 0xe93f0 size 0x16c10 offset 0xfffd8770 filesize 0xb5a0
Loading segment from rom address 0xfffd8754
  Entry Point 0x000fc8c6
Loading Segment: addr: 0x00000000000e93f0 memsz: 0x0000000000016c10 filesz: 0x000000000000b5a0
lb: [0x0000000000100000, 0x0000000000134000)
Post relocation: addr: 0x00000000000e93f0 memsz: 0x0000000000016c10 filesz: 0x000000000000b5a0
using LZMA
[ 0x000e93f0, 00100000, 0x00100000) <- fffd8770
dest 000e93f0, end 00100000, bouncebuffer 17f88000
Loaded segments
Jumping to boot code at fc8c6
entry    = 0x000fc8c6
lb_start = 0x00100000
lb_size  = 0x00034000
adjust   = 0x17ebc000
buffer   = 0x17f88000
     elf_boot_notes = 0x00125c60
adjusted_boot_notes = 0x17fe1c60
Start bios (version 0.6.1-20100913_130029-morn.localdomain)
Unable to find coreboot table!
Found CBFS header at 0xfffffc9e
Ram Size=0x01000000 (0x0000000000000000 high)
CPU Mhz=451
No apic - only the main cpu is present.
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version 0.6.1-20100913_130029-morn.localdomain)

UHCI init on dev 00:07.2 (io=1080)
Found 0 lpt ports
Found 3 serial ports
ATA controller 0 at 1f0/3f4/0 (irq 14 dev 39)
ATA controller 1 at 170/374/0 (irq 15 dev 39)
ebda moved from 9fc00 to 9f800
USB mouse initialized
USB keyboard initialized
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at cf00:0003
Running option rom at d000:0003
Press F12 for boot menu.

Select boot device:

-------------- next part --------------
#
# Automatically generated make config: don't edit
# coreboot version: 4.0
# Wed Dec 29 22:22:36 2010
#

#
# General setup
#
# CONFIG_EXPERT is not set
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_SCANBUILD_ENABLE is not set
# CONFIG_CCACHE is not set
# CONFIG_USE_OPTION_TABLE is not set

#
# Mainboard
#
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADVANTECH is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_ARIMA is not set
# CONFIG_VENDOR_ARTEC_GROUP is not set
# CONFIG_VENDOR_ASI is not set
# CONFIG_VENDOR_ASROCK is not set
CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AXUS is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_DIGITAL_LOGIC is not set
# CONFIG_VENDOR_EAGLELION is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NEWISYS is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PC_ENGINES is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_TECHNOLOGIC is not set
# CONFIG_VENDOR_TELEVIDEO is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/p2b"
CONFIG_MAINBOARD_PART_NUMBER="P2B"
CONFIG_IRQ_SLOT_COUNT=6
CONFIG_MAINBOARD_VENDOR="ASUS"
CONFIG_MAX_CPUS=1
CONFIG_MAX_PHYSICAL_CPUS=1
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1043
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x0
CONFIG_DCACHE_RAM_SIZE=0x01000
CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE=0x0
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_RAMBASE=0x100000
CONFIG_SERIAL_CPU_INIT=y
CONFIG_ACPI_SSDTX_NUM=0
CONFIG_ID_SECTION_OFFSET=0x10
# CONFIG_BOARD_ASUS_A8N_E is not set
# CONFIG_BOARD_ASUS_A8V_E_SE is not set
# CONFIG_BOARD_ASUS_A8V_E_DELUXE is not set
# CONFIG_BOARD_ASUS_M2N_E is not set
# CONFIG_BOARD_ASUS_M2V is not set
# CONFIG_BOARD_ASUS_M2V_MX_SE is not set
# CONFIG_BOARD_ASUS_M4A785M is not set
# CONFIG_BOARD_ASUS_M4A78_EM is not set
# CONFIG_BOARD_ASUS_MEW_AM is not set
# CONFIG_BOARD_ASUS_MEW_VM is not set
CONFIG_BOARD_ASUS_P2B=y
# CONFIG_BOARD_ASUS_P2B_D is not set
# CONFIG_BOARD_ASUS_P2B_DS is not set
# CONFIG_BOARD_ASUS_P2B_F is not set
# CONFIG_BOARD_ASUS_P2B_LS is not set
# CONFIG_BOARD_ASUS_P3B_F is not set
# CONFIG_PCI_64BIT_PREF_MEM is not set
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82371eb/bootblock.c"
# CONFIG_MMCONF_SUPPORT_DEFAULT is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_LOGICAL_CPUS=y
# CONFIG_IOAPIC is not set
# CONFIG_SMP is not set
CONFIG_STACK_SIZE=0x8000
CONFIG_TTYS0_BAUD=115200
CONFIG_TTYS0_BASE=0x3f8
CONFIG_TTYS0_LCS=3
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
CONFIG_CONSOLE_SERIAL8250=y
# CONFIG_PCI_ROM_RUN is not set
# CONFIG_USBDEBUG is not set
CONFIG_VAR_MTRR_HOLE=y
# CONFIG_LIFT_BSP_APIC_ID is not set
# CONFIG_WAIT_BEFORE_CPUS_INIT is not set
# CONFIG_K8_REV_F_SUPPORT is not set
CONFIG_BOARD_ROMSIZE_KB_256=y
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
CONFIG_COREBOOT_ROMSIZE_KB_256=y
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB=256
CONFIG_ROM_SIZE=0x40000
CONFIG_ARCH_X86=y
# CONFIG_AP_IN_SIPI_WAIT is not set
CONFIG_ARCH="i386"
CONFIG_ROMBASE=0xffff0000
CONFIG_ROM_IMAGE_SIZE=0x10000
CONFIG_MAX_REBOOT_CNT=3
CONFIG_TINY_BOOTBLOCK=y
# CONFIG_BIG_BOOTBLOCK is not set
CONFIG_X86_BOOTBLOCK_SIMPLE=y
# CONFIG_X86_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_ROMCC is not set
CONFIG_PC80_SYSTEM=y

#
# Chipset
#

#
# CPU
#
CONFIG_CPU_ADDR_BITS=36
CONFIG_XIP_ROM_BASE=0xffff0000
CONFIG_XIP_ROM_SIZE=0x10000
# CONFIG_UDELAY_IO is not set
CONFIG_CPU_INTEL_SLOT_1=y
# CONFIG_SSE2 is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
# CONFIG_TSC_CALIBRATE_WITH_IO is not set
CONFIG_CACHE_AS_RAM=y

#
# Northbridge
#
CONFIG_VIDEO_MB=0
CONFIG_NORTHBRIDGE_INTEL_I440BX=y
# CONFIG_SDRAMPWR_4DIMM is not set

#
# Southbridge
#
CONFIG_SOUTHBRIDGE_INTEL_I82371EB=y

#
# Super I/O
#
CONFIG_SUPERIO_WINBOND_W83977TF=y

#
# Devices
#
CONFIG_VGA_BRIDGE_SETUP=y
CONFIG_VGA_ROM_RUN=y
CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y
# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_AGP_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y

#
# Generic Drivers
#
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_PCI_BUS_SEGN_BITS=0
# CONFIG_MMCONF_SUPPORT is not set

#
# Console options
#
CONFIG_CONSOLE_SERIAL_COM1=y
# CONFIG_CONSOLE_SERIAL_COM2 is not set
# CONFIG_CONSOLE_SERIAL_COM3 is not set
# CONFIG_CONSOLE_SERIAL_COM4 is not set
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
# CONFIG_HAVE_USBDEBUG is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_8=y
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CONSOLE_LOGBUF is not set
# CONFIG_NO_POST is not set
# CONFIG_SERIAL_POST is not set
# CONFIG_HAVE_ACPI_RESUME is not set
# CONFIG_HAVE_ACPI_SLIC is not set
# CONFIG_HAVE_HARD_RESET is not set
CONFIG_HAVE_INIT_TIMER=y
# CONFIG_HAVE_MAINBOARD_RESOURCES is not set
# CONFIG_HAVE_OPTION_TABLE is not set
# CONFIG_PIRQ_ROUTE is not set
# CONFIG_HAVE_SMI_HANDLER is not set
# CONFIG_PCI_IO_CFG_EXT is not set
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_VGA is not set
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_HAVE_PIRQ_TABLE=y
CONFIG_GENERATE_ACPI_TABLES=y
# CONFIG_GENERATE_MP_TABLE is not set

#
# System tables
#
CONFIG_WRITE_HIGH_TABLES=y
CONFIG_MULTIBOOT=y

#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
CONFIG_PAYLOAD_ELF=y
CONFIG_PAYLOAD_FILE="/home/roger/src/coreboot-p2bx/seabios/bios.bin.elf-0.6.1"
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
# CONFIG_COMPRESSED_PAYLOAD_NRV2B is not set

#
# VGA BIOS
#
# CONFIG_VGA_BIOS is not set

#
# Debugging
#
CONFIG_GDB_STUB=y
CONFIG_HAVE_DEBUG_RAM_SETUP=y
CONFIG_DEBUG_RAM_SETUP=y
# CONFIG_HAVE_DEBUG_CAR is not set
CONFIG_DEBUG_PIRQ=y
# CONFIG_HAVE_DEBUG_SMBUS is not set
CONFIG_DEBUG_MALLOC=y
# CONFIG_REALMODE_DEBUG is not set
# CONFIG_LLSHELL is not set
# CONFIG_AP_CODE_IN_CAR is not set
# CONFIG_RAMINIT_SYSINFO is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_BOARD_HAS_HARD_RESET is not set
# CONFIG_BOARD_HAS_FADT is not set
# CONFIG_HAVE_BUS_CONFIG is not set
CONFIG_DRIVERS_PS2_KEYBOARD=y


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