[coreboot] [commit] r6144 - in trunk/src/mainboard/supermicro: x6dhe_g x6dhe_g2 x6dhr_ig x6dhr_ig2

repository service svn at coreboot.org
Mon Dec 6 19:20:49 CET 2010


Author: uwe
Date: Mon Dec  6 19:20:48 2010
New Revision: 6144
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6144

Log:
Get rid of some useless/empty *_fixups.c files.

Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Deleted:
   trunk/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c
   trunk/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c
   trunk/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c
   trunk/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c
Modified:
   trunk/src/mainboard/supermicro/x6dhe_g/romstage.c
   trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c
   trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c
   trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c

Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c	Mon Dec  6 19:17:01 2010	(r6143)
+++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c	Mon Dec  6 19:20:48 2010	(r6144)
@@ -16,7 +16,6 @@
 #include "debug.c"
 #include "watchdog.c"
 #include "reset.c"
-#include "x6dhe_g_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
@@ -35,6 +34,10 @@
 	0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
+static void mch_reset(void) {}
+static void mainboard_set_e7520_pll(unsigned bits) {}
+static void mainboard_set_e7520_leds(void) {}
+
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c	Mon Dec  6 19:17:01 2010	(r6143)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c	Mon Dec  6 19:20:48 2010	(r6144)
@@ -14,7 +14,6 @@
 #include "debug.c"
 #include "watchdog.c"
 #include "reset.c"
-#include "x6dhe_g2_fixups.c"
 #include "superio/nsc/pc87427/pc87427_early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
@@ -32,6 +31,10 @@
 	0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
+static void mch_reset(void) {}
+static void mainboard_set_e7520_pll(unsigned bits) {}
+static void mainboard_set_e7520_leds(void) {}
+
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c	Mon Dec  6 19:17:01 2010	(r6143)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c	Mon Dec  6 19:20:48 2010	(r6144)
@@ -14,7 +14,6 @@
 #include "debug.c"
 #include "watchdog.c"
 #include "reset.c"
-#include "x6dhr_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
@@ -34,6 +33,10 @@
 	0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
+static void mch_reset(void) {}
+static void mainboard_set_e7520_pll(unsigned bits) {}
+static void mainboard_set_e7520_leds(void) {}
+
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c	Mon Dec  6 19:17:01 2010	(r6143)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c	Mon Dec  6 19:20:48 2010	(r6144)
@@ -14,7 +14,6 @@
 #include "debug.c"
 #include "watchdog.c"
 #include "reset.c"
-#include "x6dhr2_fixups.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
@@ -34,6 +33,10 @@
 	0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
+static void mch_reset(void) {}
+static void mainboard_set_e7520_pll(unsigned bits) {}
+static void mainboard_set_e7520_leds(void) {}
+
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);




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