[coreboot] [commit] r6140 - in trunk/src: include/device mainboard/asrock/939a785gmh mainboard/asus/a8v-e_deluxe mainboard/asus/a8v-e_se mainboard/ibase/mb899 mainboard/kontron/kt690 mainboard/msi/ms7260 main...
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Sun Dec 5 23:36:15 CET 2010
Author: uwe
Date: Sun Dec 5 23:36:14 2010
New Revision: 6140
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6140
Log:
W83627DHG/W83627EHG fixups for virtual LDNs.
W83627DHG:
- Add proper "virtual LDN" handling for the LDNs that need it (i.e., those
that don't have their "enable" bit in bit 0 of the 0x30 register).
- Fix various I/O masks in the pnp_dev_info[] array as per
datasheet. Add missing PNP_IRQ0 to the W83627DHG_ACPI LDN.
W83627EHG:
- Similar to W83627DHG, improve the "virtual LDN" setup a bit (it was
mostly implemented already, though).
- Add missing PNP_IRQ0 to the W83627EHG_ACPI LDN.
Also: Fix up devicetree.cb of all boards using W83627DHG/W83627EHG to adapt
for the virtual LDNs.
include/device/pnp.h: Add comment that 'function' (which refers to the
LDN and should probably be renamed later) has to be at least 16 bits
wide. In theory LDNs could use u8, but due to the virtual LDN info being
encoded in the "high byte" of 'function' it must be at least u16.
asrock/939a785gmh/romstage.c: Drop unused GPIO6_DEV.
ibase/mb899/romstage.c: Use DUMMY_DEV instead of a specific LDN (serial
port 1 in this case) to avoid confusion. The global registers
manipulated there are accessible from any LDN.
Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Rudolf Marek <r.marek at assembler.cz>
Modified:
trunk/src/include/device/pnp.h
trunk/src/mainboard/asrock/939a785gmh/devicetree.cb
trunk/src/mainboard/asrock/939a785gmh/romstage.c
trunk/src/mainboard/asus/a8v-e_deluxe/devicetree.cb
trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c
trunk/src/mainboard/asus/a8v-e_se/devicetree.cb
trunk/src/mainboard/asus/a8v-e_se/romstage.c
trunk/src/mainboard/ibase/mb899/devicetree.cb
trunk/src/mainboard/ibase/mb899/romstage.c
trunk/src/mainboard/kontron/kt690/devicetree.cb
trunk/src/mainboard/msi/ms7260/devicetree.cb
trunk/src/mainboard/msi/ms9282/devicetree.cb
trunk/src/mainboard/msi/ms9652_fam10/devicetree.cb
trunk/src/mainboard/nvidia/l1_2pvv/devicetree.cb
trunk/src/superio/winbond/w83627dhg/superio.c
trunk/src/superio/winbond/w83627dhg/w83627dhg.h
trunk/src/superio/winbond/w83627ehg/superio.c
trunk/src/superio/winbond/w83627ehg/w83627ehg.h
Modified: trunk/src/include/device/pnp.h
==============================================================================
--- trunk/src/include/device/pnp.h Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/include/device/pnp.h Sun Dec 5 23:36:14 2010 (r6140)
@@ -31,7 +31,7 @@
struct pnp_info {
struct device_operations *ops;
- unsigned int function;
+ unsigned int function; /* Must be at least 16 bits (virtual LDNs)! */
unsigned int flags;
#define PNP_IO0 0x001
#define PNP_IO1 0x002
Modified: trunk/src/mainboard/asrock/939a785gmh/devicetree.cb
==============================================================================
--- trunk/src/mainboard/asrock/939a785gmh/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/asrock/939a785gmh/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -85,7 +85,7 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 2e.5 on # Keyboard
+ device pnp 2e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
Modified: trunk/src/mainboard/asrock/939a785gmh/romstage.c
==============================================================================
--- trunk/src/mainboard/asrock/939a785gmh/romstage.c Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/asrock/939a785gmh/romstage.c Sun Dec 5 23:36:14 2010 (r6140)
@@ -49,8 +49,7 @@
#include "northbridge/amd/amdk8/debug.c" /* After sb700_early_setup.c! */
#define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
-#define GPIO6_DEV PNP_DEV(0x2e, W83627DHG_GPIO6)
-#define GPIO2345_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345)
+#define GPIO2345_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
Modified: trunk/src/mainboard/asus/a8v-e_deluxe/devicetree.cb
==============================================================================
--- trunk/src/mainboard/asus/a8v-e_deluxe/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/asus/a8v-e_deluxe/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -49,9 +49,9 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 2e.5 off # PS/2 keyboard (off)
+ device pnp 2e.5 off # PS/2 keyboard & mouse (off)
end
- device pnp 2e.106 off # Serial flash
+ device pnp 2e.106 off # Serial flash interface (SFI)
io 0x60 = 0x100
end
device pnp 2e.007 off # GPIO 1
@@ -65,15 +65,15 @@
end
device pnp 2e.307 off # GPIO 6
end
- device pnp 2e.8 off # WDTO_PLED
+ device pnp 2e.8 off # WDTO#, PLED
end
- device pnp 2e.009 on # GPIO 2 on LDN 9 is in sio_setup
+ device pnp 2e.009 on # GPIO 2
end
device pnp 2e.109 off # GPIO 3
end
device pnp 2e.209 off # GPIO 4
end
- device pnp 2e.309 on # GPIO5
+ device pnp 2e.309 on # GPIO 5
end
device pnp 2e.a off # ACPI
end
Modified: trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c
==============================================================================
--- trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c Sun Dec 5 23:36:14 2010 (r6140)
@@ -49,7 +49,7 @@
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
-#define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED)
+#define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED_V)
#define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
Modified: trunk/src/mainboard/asus/a8v-e_se/devicetree.cb
==============================================================================
--- trunk/src/mainboard/asus/a8v-e_se/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/asus/a8v-e_se/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -49,9 +49,9 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 2e.5 off # PS/2 keyboard (off)
+ device pnp 2e.5 off # PS/2 keyboard & mouse (off)
end
- device pnp 2e.106 off # Serial flash
+ device pnp 2e.106 off # Serial flash interface (SFI)
io 0x60 = 0x100
end
device pnp 2e.007 off # GPIO 1
@@ -65,15 +65,15 @@
end
device pnp 2e.307 off # GPIO 6
end
- device pnp 2e.8 off # WDTO_PLED
+ device pnp 2e.8 off # WDTO#, PLED
end
- device pnp 2e.009 on # GPIO 2 on LDN 9 is in sio_setup
+ device pnp 2e.009 on # GPIO 2
end
device pnp 2e.109 off # GPIO 3
end
device pnp 2e.209 off # GPIO 4
end
- device pnp 2e.309 on # GPIO5
+ device pnp 2e.309 on # GPIO 5
end
device pnp 2e.a off # ACPI
end
Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c
==============================================================================
--- trunk/src/mainboard/asus/a8v-e_se/romstage.c Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/asus/a8v-e_se/romstage.c Sun Dec 5 23:36:14 2010 (r6140)
@@ -49,7 +49,7 @@
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
-#define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED)
+#define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED_V)
#define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
Modified: trunk/src/mainboard/ibase/mb899/devicetree.cb
==============================================================================
--- trunk/src/mainboard/ibase/mb899/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/ibase/mb899/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -63,29 +63,38 @@
irq 0x70 = 3
irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
end
- device pnp 4e.5 on # Keyboard+Mouse
+ device pnp 4e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
irq 0xf0 = 0x82 # HW accel A20.
end
- device pnp 4e.7 on # GPIO1, GAME, MIDI
- io 0x62 = 0x330
+ device pnp 4e.106 off end # Serial flash interface (SFI)
+ device pnp 4e.007 off end # GPIO 1
+ device pnp 4e.107 off end # Game port
+ device pnp 4e.207 on # MIDI
+ io 0x62 = 0x330
irq 0x70 = 9
end
- device pnp 4e.8 on # GPIO2
- # all default
+ device pnp 4e.307 off end # GPIO 6
+ device pnp 4e.8 off end # WDTO#, PLED
+ device pnp 4e.009 on # GPIO 2
+ # All default
end
- device pnp 4e.9 on # GPIO3/4
- irq 0x30 = 0x03 # does this work?
+ device pnp 4e.109 on # GPIO 3
irq 0xf0 = 0xfb # set inputs/outputs
irq 0xf1 = 0x66
end
+ device pnp 4e.209 on # GPIO 4
+ end
+ device pnp 4e.309 off # GPIO 5
+ end
device pnp 4e.a on # ACPI
+ # TODO: IRQ
end
device pnp 4e.b on # HWM
- io 0x60 = 0x290
+ io 0x60 = 0x290
irq 0x70 = 0
end
Modified: trunk/src/mainboard/ibase/mb899/romstage.c
==============================================================================
--- trunk/src/mainboard/ibase/mb899/romstage.c Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/ibase/mb899/romstage.c Sun Dec 5 23:36:14 2010 (r6140)
@@ -38,6 +38,7 @@
#include "southbridge/intel/i82801gx/i82801gx.h"
#define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)
+#define DUMMY_DEV PNP_DEV(0x4e, 0)
void enable_smbus(void);
@@ -79,7 +80,7 @@
{
device_t dev;
- dev=PNP_DEV(0x4e, W83627EHG_SP1);
+ dev = DUMMY_DEV;
pnp_enter_ext_func_mode(dev);
pnp_write_config(dev, 0x24, 0xc4); // PNPCSV
Modified: trunk/src/mainboard/kontron/kt690/devicetree.cb
==============================================================================
--- trunk/src/mainboard/kontron/kt690/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/kontron/kt690/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -83,11 +83,17 @@
end
#device pnp 2e.6 off # SPI
#end
- device pnp 2e.7 off # GPIO
+ device pnp 2e.307 off # GPIO 1
end
device pnp 2e.8 on # WDTO#, PLED
end
- device pnp 2e.9 off # GPIO
+ device pnp 2e.009 off # GPIO2
+ end
+ device pnp 2e.109 off # GPIO3
+ end
+ device pnp 2e.209 off # GPIO4
+ end
+ device pnp 2e.309 off # GPIO5
end
device pnp 2e.a off # ACPI
end
Modified: trunk/src/mainboard/msi/ms7260/devicetree.cb
==============================================================================
--- trunk/src/mainboard/msi/ms7260/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/msi/ms7260/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -28,28 +28,41 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 4e.5 on # PS/2 keyboard
+ device pnp 4e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1 # PS/2 keyboard IRQ
irq 0x72 = 12 # PS/2 mouse IRQ
end
- device pnp 4e.6 off # Serial flash interface
+ device pnp 4e.106 off # Serial flash interface (SFI)
# io 0x62 = 0x100
end
- device pnp 4e.7 off # GPIO1/6, game port, MIDI port
+ device pnp 4e.007 off # GPIO 1
+ end
+ device pnp 4e.107 off # Game port
# io 0x60 = 0x220 # Datasheet: 0x201
+ end
+ device pnp 4e.207 off # MIDI
# io 0x62 = 0x300 # Datasheet: 0x330
# irq 0x70 = 9
end
+ device pnp 4e.307 off # GPIO 6
+ end
device pnp 4e.8 off # WDTO#, PLED
end
- device pnp 4e.9 off # GPIO2/3/4/5, SUSLED
+ device pnp 4e.009 off # GPIO 2
+ end
+ device pnp 4e.109 off # GPIO 3
+ end
+ device pnp 4e.209 off # GPIO 4
+ end
+ device pnp 4e.309 off # GPIO 5
end
device pnp 4e.a off # ACPI
end
- device pnp 4e.b on # HWM (for lm-sensors)
+ device pnp 4e.b on # Hardware monitor
io 0x60 = 0xa10
+ # TODO: IRQ?
end
end
end
Modified: trunk/src/mainboard/msi/ms9282/devicetree.cb
==============================================================================
--- trunk/src/mainboard/msi/ms9282/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/msi/ms9282/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -28,22 +28,35 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 2e.5 on # PS/2 keyboard
+ device pnp 2e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
end
- device pnp 2e.6 off # Serial flash
+ device pnp 2e.106 off # Serial flash interface (SFI)
io 0x60 = 0x100
end
- device pnp 2e.7 off # Game port, MIDI, GPIO1
+ device pnp 2e.007 off # GPIO 1
+ end
+ device pnp 2e.107 off # Game port
io 0x60 = 0x220
+ end
+ device pnp 2e.207 off # MIDI
io 0x62 = 0x300
irq 0x70 = 9
end
- device pnp 2e.8 off end # WDTO PLED
- device pnp 2e.9 off end # GPIO2, GPIO3, GPIO4, GPIO5
+ device pnp 2e.307 off # GPIO 6
+ end
+ device pnp 2e.8 off end # WDTO#, PLED
+ device pnp 2e.009 off # GPIO 2
+ end
+ device pnp 2e.109 off # GPIO 3
+ end
+ device pnp 2e.209 off # GPIO 4
+ end
+ device pnp 2e.309 off # GPIO 5
+ end
device pnp 2e.a off end # ACPI
device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290
Modified: trunk/src/mainboard/msi/ms9652_fam10/devicetree.cb
==============================================================================
--- trunk/src/mainboard/msi/ms9652_fam10/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/msi/ms9652_fam10/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -51,34 +51,41 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 2e.5 on # PS/2 keyboard
+ device pnp 2e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
end
- device pnp 2e.6 off # Serial flash
+ device pnp 2e.106 off # Serial flash interface (SFI)
io 0x60 = 0x100
end
- device pnp 2e.7 off # Game port, MIDI, GPIO1
+ device pnp 2e.007 off # GPIO 1
+ end
+ device pnp 2e.107 on # Game port
io 0x60 = 0x220
- io 0x62 = 0x300
- irq 0x70 = 9
end
- device pnp 2e.8 off end # WDTO PLED
- device pnp 2e.9 off end # GPIO2, GPIO3, GPIO4, GPIO5
+ device pnp 2e.207 on # MIDI
+ io 0x62 = 0x330
+ irq 0x70 = 0xa
+ end
+ device pnp 2e.307 off # GPIO 6
+ end
+ device pnp 2e.8 off # WDTO#, PLED
+ end
+ device pnp 2e.009 off # GPIO 2
+ end
+ device pnp 2e.109 off # GPIO 3
+ end
+ device pnp 2e.209 off # GPIO 4
+ end
+ device pnp 2e.309 off # GPIO 5
+ end
device pnp 2e.a off end # ACPI
device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290
irq 0x70 = 5
end
- device pnp 2e.106 off # Serial flash
- io 0x60 = 0x100
- end
- device pnp 2e.207 on # MIDI
- io 0x62 = 0x330
- irq 0x70 = 0xa
- end
end
end
device pci 1.1 on # SM 0
Modified: trunk/src/mainboard/nvidia/l1_2pvv/devicetree.cb
==============================================================================
--- trunk/src/mainboard/nvidia/l1_2pvv/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/mainboard/nvidia/l1_2pvv/devicetree.cb Sun Dec 5 23:36:14 2010 (r6140)
@@ -28,22 +28,36 @@
io 0x60 = 0x2f8
irq 0x70 = 3
end
- device pnp 2e.5 on # PS/2 keyboard
+ device pnp 2e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
end
- device pnp 2e.6 off # SFI
- io 0x62 = 0x100
+ device pnp 2e.106 off # Serial flash interface (SFI)
+ io 0x60 = 0x100
end
- device pnp 2e.7 off # GPIO, Game port, MIDI
+ device pnp 2e.007 off # GPIO 1
+ end
+ device pnp 2e.107 off # Game port
io 0x60 = 0x220
+ end
+ device pnp 2e.207 off # MIDI
io 0x62 = 0x300
irq 0x70 = 9
end
- device pnp 2e.8 off end # WDTO PLED
- device pnp 2e.9 off end # GPIO SUSLED
+ device pnp 2e.307 off # GPIO 6
+ end
+ device pnp 2e.8 off # WDTO#, PLED
+ end
+ device pnp 2e.009 off # GPIO 2
+ end
+ device pnp 2e.109 off # GPIO 3
+ end
+ device pnp 2e.209 off # GPIO 4
+ end
+ device pnp 2e.309 off # GPIO 5
+ end
device pnp 2e.a off end # ACPI
device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290
Modified: trunk/src/superio/winbond/w83627dhg/superio.c
==============================================================================
--- trunk/src/superio/winbond/w83627dhg/superio.c Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/superio/winbond/w83627dhg/superio.c Sun Dec 5 23:36:14 2010 (r6140)
@@ -94,18 +94,21 @@
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, },
+ { &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
/* the next line makes coreboot hang in pnp_enable_devices() */
- /* { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, */
+ /* { &ops, W83627DHG_SPI, PNP_IO1, { 0x7f8, 0 }, }, */
{ &ops, W83627DHG_GPIO6, },
{ &ops, W83627DHG_WDTO_PLED, },
- { &ops, W83627DHG_GPIO2345, },
- { &ops, W83627DHG_ACPI, },
- { &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ffe, 0}, },
+ { &ops, W83627DHG_GPIO2, },
+ { &ops, W83627DHG_GPIO3, },
+ { &ops, W83627DHG_GPIO4, },
+ { &ops, W83627DHG_GPIO5, },
+ { &ops, W83627DHG_ACPI, PNP_IRQ0, },
+ { &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, {0x07fe, 0}, },
{ &ops, W83627DHG_PECI_SST, },
};
Modified: trunk/src/superio/winbond/w83627dhg/w83627dhg.h
==============================================================================
--- trunk/src/superio/winbond/w83627dhg/w83627dhg.h Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/superio/winbond/w83627dhg/w83627dhg.h Sun Dec 5 23:36:14 2010 (r6140)
@@ -25,13 +25,30 @@
#define W83627DHG_PP 1 /* Parallel port */
#define W83627DHG_SP1 2 /* Com1 */
#define W83627DHG_SP2 3 /* Com2 */
-#define W83627DHG_KBC 5 /* PS/2 keyboard + mouse */
+#define W83627DHG_KBC 5 /* PS/2 keyboard & mouse */
#define W83627DHG_SPI 6 /* Serial peripheral interface */
-#define W83627DHG_GPIO6 7 /* GPIO6 */
#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
-#define W83627DHG_GPIO2345 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */
#define W83627DHG_ACPI 10 /* ACPI */
#define W83627DHG_HWM 11 /* Hardware monitor */
#define W83627DHG_PECI_SST 12 /* PECI, SST */
+/* The following are handled using "virtual LDNs" (hence the _V suffix). */
+#define W83627DHG_GPIO6_V 7 /* GPIO6 */
+#define W83627DHG_GPIO2345_V 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */
+
+/*
+ * Virtual devices sharing the enables are encoded as follows:
+ * VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
+ */
+
+/* GPIO6 has bit 3 as enable (instead of bit 0 as usual). */
+#define W83627DHG_GPIO6 ((3 << 8) | W83627DHG_GPIO6_V)
+
+#define W83627DHG_GPIO2 ((0 << 8) | W83627DHG_GPIO2345_V)
+#define W83627DHG_GPIO3 ((1 << 8) | W83627DHG_GPIO2345_V)
+#define W83627DHG_GPIO4 ((2 << 8) | W83627DHG_GPIO2345_V)
+#define W83627DHG_GPIO5 ((3 << 8) | W83627DHG_GPIO2345_V)
+
+/* Note: There is no GPIO1 on the W83627DHG as per datasheet. */
+
#endif
Modified: trunk/src/superio/winbond/w83627ehg/superio.c
==============================================================================
--- trunk/src/superio/winbond/w83627ehg/superio.c Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/superio/winbond/w83627ehg/superio.c Sun Dec 5 23:36:14 2010 (r6140)
@@ -178,17 +178,18 @@
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, W83627EHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
- { &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
+ { &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, W83627EHG_WDTO_PLED, },
- { &ops, W83627EHG_ACPI, },
- { &ops, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, W83627EHG_ACPI, PNP_IRQ0, },
+ { &ops, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, {0x07fe, 0}, },
+
{ &ops, W83627EHG_GAME, PNP_IO0, {0x07ff, 0}, },
- { &ops, W83627EHG_MIDI, PNP_IO1 | PNP_IRQ0, {0x07ff, 0}, {0x07fe, 4}, },
+ { &ops, W83627EHG_MIDI, PNP_IO1 | PNP_IRQ0, {0x07fe, 4}, },
{ &ops, W83627EHG_GPIO1, },
{ &ops, W83627EHG_GPIO2, },
{ &ops, W83627EHG_GPIO3, },
Modified: trunk/src/superio/winbond/w83627ehg/w83627ehg.h
==============================================================================
--- trunk/src/superio/winbond/w83627ehg/w83627ehg.h Sat Dec 4 21:50:39 2010 (r6139)
+++ trunk/src/superio/winbond/w83627ehg/w83627ehg.h Sun Dec 5 23:36:14 2010 (r6140)
@@ -27,27 +27,32 @@
#define W83627EHG_SP1 2 /* Com1 */
#define W83627EHG_SP2 3 /* Com2 */
#define W83627EHG_KBC 5 /* PS/2 keyboard & mouse */
-#define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game port, MIDI port */
-#define W83627EHG_WDTO_PLED 8 /* TODO */
-#define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */
+#define W83627EHG_WDTO_PLED 8 /* Watchdog timer timeout, power LED */
#define W83627EHG_ACPI 10 /* ACPI */
#define W83627EHG_HWM 11 /* Hardware monitor */
+/* The following are handled using "virtual LDNs" (hence the _V suffix). */
+#define W83627EHG_SFI_V 6 /* Serial flash interface (SFI) */
+#define W83627EHG_GPIO_GAME_MIDI_V 7 /* GPIO1, GPIO6, game port, MIDI */
+#define W83627EHG_GPIO_SUSLED_V 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */
+
/*
* Virtual devices sharing the enables are encoded as follows:
* VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
*/
-#define W83627EHG_SFI ((1 << 8) | 6) /* Flash has bit1 as enable */
-#define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1: LDN 7, bit 0 */
-#define W83627EHG_GAME ((1 << 8) | 7)
-#define W83627EHG_MIDI ((2 << 8) | 7)
-#define W83627EHG_GPIO6 ((3 << 8) | 7)
-
-#define W83627EHG_GPIO2 W83627EHG_GPIO_SUSLED /* GPIO2: LDN 9, bit 0 */
-#define W83627EHG_GPIO3 ((1 << 8) | 9)
-#define W83627EHG_GPIO4 ((2 << 8) | 9)
-#define W83627EHG_GPIO5 ((3 << 8) | 9)
+/* SFI has bit 1 as enable (instead of bit 0 as usual). */
+#define W83627EHG_SFI ((1 << 8) | W83627EHG_SFI_V)
+
+#define W83627EHG_GPIO1 ((0 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+#define W83627EHG_GAME ((1 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+#define W83627EHG_MIDI ((2 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+#define W83627EHG_GPIO6 ((3 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+
+#define W83627EHG_GPIO2 ((0 << 8) | W83627EHG_GPIO_SUSLED_V)
+#define W83627EHG_GPIO3 ((1 << 8) | W83627EHG_GPIO_SUSLED_V)
+#define W83627EHG_GPIO4 ((2 << 8) | W83627EHG_GPIO_SUSLED_V)
+#define W83627EHG_GPIO5 ((3 << 8) | W83627EHG_GPIO_SUSLED_V)
#if defined(__PRE_RAM__) && !defined(__ROMCC__)
void w83627ehg_enable_dev(device_t dev, u16 iobase);
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