[coreboot] [PATCH] Complete AMD erratum 343 workaround

xdrudis xdrudis at tinet.cat
Thu Aug 19 23:58:25 CEST 2010


Up to this patch, tests did the same as without the patches,
hang after setAMDMSR , but still I think they are useful,
since they get closer to documentation and don't make things worse.

Signed off by: Xavi Drudis Ferran <xdrudis at tinet.cat>
-------------- next part --------------
Complete code for errata 343.  Revision Guide for AMD Family10h
processors (#41322) rev 3.74 June 2010 says to set the register 
to 1 before CAR and to 0 after. We were setting it to 0 after CAR,
but not to 1 before.

apply after patch.rbc3inErr346

Index: src/cpu/amd/model_10xxx/defaults.h
===================================================================
--- src/cpu/amd/model_10xxx/defaults.h	(revision 5692)
+++ src/cpu/amd/model_10xxx/defaults.h	(working copy)
@@ -88,6 +88,10 @@
 	{ CPUIDFEATURES, AMD_FAM10_ALL, AMD_PTYPE_DC,
 	  0x00000000, 1 << (33-32),
 	  0x00000000, 1 << (33-32) },	/* [ExtendedFeatEn]=1 */
+
+        { BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL,
+	  0x00000000, 1 << (35-32),
+	  0x00000000, 1 << (35-32) },	/* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() )  */  
 };
 



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