[coreboot] [commit] r5717 - in trunk/src/superio/fintek: . f71863fg
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svn at coreboot.org
Tue Aug 17 17:05:06 CEST 2010
Author: stepan
Date: Tue Aug 17 17:05:05 2010
New Revision: 5717
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5717
Log:
Support for Fintek F71863FG. This might need some work on the copyright
notices. Getting it into the tree so people can get to it.
Signed-off-by: Wang Qing Pei <wangqingpei at gmail.com>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Added:
trunk/src/superio/fintek/f71863fg/
- copied from r5716, trunk/src/superio/fintek/f71805f/
trunk/src/superio/fintek/f71863fg/f71863fg.h
- copied, changed from r5716, trunk/src/superio/fintek/f71805f/f71805f.h
trunk/src/superio/fintek/f71863fg/f71863fg_early_serial.c
- copied, changed from r5716, trunk/src/superio/fintek/f71805f/f71805f_early_serial.c
Deleted:
trunk/src/superio/fintek/f71863fg/f71805f.h
trunk/src/superio/fintek/f71863fg/f71805f_early_serial.c
Modified:
trunk/src/superio/fintek/Kconfig
trunk/src/superio/fintek/Makefile.inc
trunk/src/superio/fintek/f71863fg/Makefile.inc
trunk/src/superio/fintek/f71863fg/chip.h
trunk/src/superio/fintek/f71863fg/superio.c
Modified: trunk/src/superio/fintek/Kconfig
==============================================================================
--- trunk/src/superio/fintek/Kconfig Tue Aug 17 13:32:21 2010 (r5716)
+++ trunk/src/superio/fintek/Kconfig Tue Aug 17 17:05:05 2010 (r5717)
@@ -1,2 +1,4 @@
config SUPERIO_FINTEK_F71805F
bool
+config SUPERIO_FINTEK_F71863FG
+ bool
Modified: trunk/src/superio/fintek/Makefile.inc
==============================================================================
--- trunk/src/superio/fintek/Makefile.inc Tue Aug 17 13:32:21 2010 (r5716)
+++ trunk/src/superio/fintek/Makefile.inc Tue Aug 17 17:05:05 2010 (r5717)
@@ -1 +1,2 @@
subdirs-y += f71805f
+subdirs-y += f71863fg
Modified: trunk/src/superio/fintek/f71863fg/Makefile.inc
==============================================================================
--- trunk/src/superio/fintek/f71805f/Makefile.inc Tue Aug 17 13:32:21 2010 (r5716)
+++ trunk/src/superio/fintek/f71863fg/Makefile.inc Tue Aug 17 17:05:05 2010 (r5717)
@@ -1,7 +1,7 @@
##
## This file is part of the coreboot project.
##
-## Copyright (C) 2008 Corey Osgood <corey.osgood at gmail.com>
+## Copyright (C) 2010 Wang Qing Pei <wangqingpei at gmail.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-#config chip.h
-obj-$(CONFIG_SUPERIO_FINTEK_F71805F) += superio.o
+obj-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.o
+
Modified: trunk/src/superio/fintek/f71863fg/chip.h
==============================================================================
--- trunk/src/superio/fintek/f71805f/chip.h Tue Aug 17 13:32:21 2010 (r5716)
+++ trunk/src/superio/fintek/f71863fg/chip.h Tue Aug 17 17:05:05 2010 (r5717)
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2007 Corey Osgood <corey at slightlyhackish.com>
+ * Copyright (C) 2010 Wang Qing Pei <wangqingpei at gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -23,8 +23,8 @@
/* This chip doesn't have keyboard and mouse support. */
-extern struct chip_operations superio_fintek_f71805f_ops;
+extern struct chip_operations superio_fintek_f71863fg_ops;
-struct superio_fintek_f71805f_config {
+struct superio_fintek_f71863fg_config {
struct uart8250 com1, com2;
};
Copied and modified: trunk/src/superio/fintek/f71863fg/f71863fg.h (from r5716, trunk/src/superio/fintek/f71805f/f71805f.h)
==============================================================================
--- trunk/src/superio/fintek/f71805f/f71805f.h Tue Aug 17 13:32:21 2010 (r5716, copy source)
+++ trunk/src/superio/fintek/f71863fg/f71863fg.h Tue Aug 17 17:05:05 2010 (r5717)
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2007 Corey Osgood <corey at slightlyhackish.com>
+ * Copyright (C) 2010 Wang Qing Pei <wangqingpei at gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,19 +18,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * Datasheet:
- * - Name: F71805F/FG Super H/W Monitor + LPC IO
- * - URL: http://www.fintek.com.tw/eng/products.asp?BID=1&SID=17
- * - PDF: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf
- * - Revision: V0.25P
- */
-
/* Logical Device Numbers (LDN). */
-#define F71805F_FDC 0x00 /* Floppy */
-#define F71805F_SP1 0x01 /* UART1 */
-#define F71805F_SP2 0x02 /* UART2 */
-#define F71805F_PP 0x03 /* Parallel Port */
-#define F71805F_HWM 0x04 /* Hardware Monitor */
-#define F71805F_GPIO 0x06 /* General Purpose I/O (GPIO) */
-#define F71805F_PME 0x0a /* Power Management Events (PME) */
+#define F71863FG_FDC 0x00 /* Floppy */
+#define F71863FG_SP1 0x01 /* UART1 */
+#define F71863FG_SP2 0x02 /* UART2 */
+#define F71863FG_PP 0x03 /* Parallel Port */
+#define F71863FG_HWM 0x04 /* Hardware Monitor */
+#define F71863FG_KBC 0x05 /* KBC devices */
+#define F71863FG_GPIO 0x06 /* General Purpose I/O (GPIO) */
+#define F71863FG_PME 0x0a /* Power Management Events (PME) */
Copied and modified: trunk/src/superio/fintek/f71863fg/f71863fg_early_serial.c (from r5716, trunk/src/superio/fintek/f71805f/f71805f_early_serial.c)
==============================================================================
--- trunk/src/superio/fintek/f71805f/f71805f_early_serial.c Tue Aug 17 13:32:21 2010 (r5716, copy source)
+++ trunk/src/superio/fintek/f71863fg/f71863fg_early_serial.c Tue Aug 17 17:05:05 2010 (r5717)
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2007 Corey Osgood <corey at slightlyhackish.com>
+ * Copyright (C) 2010 Wang Qing Pei<wangqingpei at gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,10 +18,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Pre-RAM driver for the Fintek F71805F/FG Super I/O chip. */
+/* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */
#include <arch/romcc_io.h>
-#include "f71805f.h"
+#include "f71863fg.h"
static inline void pnp_enter_conf_state(device_t dev)
{
@@ -35,7 +35,7 @@
outb(0xaa, port);
}
-static void f71805f_enable_serial(device_t dev, unsigned int iobase)
+static void f71863fg_enable_serial(device_t dev, unsigned int iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
Modified: trunk/src/superio/fintek/f71863fg/superio.c
==============================================================================
--- trunk/src/superio/fintek/f71805f/superio.c Tue Aug 17 13:32:21 2010 (r5716)
+++ trunk/src/superio/fintek/f71863fg/superio.c Tue Aug 17 17:05:05 2010 (r5717)
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2008 Corey Osgood <corey.osgood at gmail.com>
+ * Copyright (C) 2010 Wang Qing Pei<wangqingpei at gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,7 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Datasheet: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf */
#include <arch/io.h>
#include <device/device.h>
@@ -27,7 +26,7 @@
#include <stdlib.h>
#include <uart8250.h>
#include "chip.h"
-#include "f71805f.h"
+#include "f71863fg.h"
static void pnp_enter_conf_state(device_t dev)
{
@@ -39,9 +38,9 @@
outb(0xaa, dev->path.pnp.port);
}
-static void f71805f_init(device_t dev)
+static void f71863fg_init(device_t dev)
{
- struct superio_fintek_f71805f_config *conf = dev->chip_info;
+ struct superio_fintek_f71863fg_config *conf = dev->chip_info;
struct resource *res0;
if (!dev->enabled)
@@ -49,32 +48,32 @@
switch(dev->path.pnp.device) {
/* TODO: Might potentially need code for HWM or FDC etc. */
- case F71805F_SP1:
+ case F71863FG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
- case F71805F_SP2:
+ case F71863FG_SP2:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
}
}
-static void f71805f_pnp_set_resources(device_t dev)
+static void f71863fg_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
-static void f71805f_pnp_enable_resources(device_t dev)
+static void f71863fg_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
-static void f71805f_pnp_enable(device_t dev)
+static void f71863fg_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
@@ -84,21 +83,21 @@
static struct device_operations ops = {
.read_resources = pnp_read_resources,
- .set_resources = f71805f_pnp_set_resources,
- .enable_resources = f71805f_pnp_enable_resources,
- .enable = f71805f_pnp_enable,
- .init = f71805f_init,
+ .set_resources = f71863fg_pnp_set_resources,
+ .enable_resources = f71863fg_pnp_enable_resources,
+ .enable = f71863fg_pnp_enable,
+ .init = f71863fg_init,
};
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x7f8 etc. values may not be correct. */
- { &ops, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
- { &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
- { &ops, F71805F_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
- { &ops, F71805F_GPIO, PNP_IRQ0, },
- { &ops, F71805F_PME, },
+ { &ops, F71863FG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+ { &ops, F71863FG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, F71863FG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, F71863FG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+ { &ops, F71863FG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
+ { &ops, F71863FG_GPIO, PNP_IRQ0, },
+ { &ops, F71863FG_PME, },
};
static void enable_dev(device_t dev)
@@ -106,7 +105,7 @@
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
-struct chip_operations superio_fintek_f71805f_ops = {
- CHIP_NAME("Fintek F71805F Super I/O")
+struct chip_operations superio_fintek_f71863fg_ops = {
+ CHIP_NAME("Fintek F71863FG Super I/O")
.enable_dev = enable_dev
};
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