[coreboot] #150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock

[coreboot]

#150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock
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    Reporter:  edwin_beasant@…              |         Owner:  somebody          
        Type:  enhancement                  |        Status:  new               
    Priority:  minor                        |     Milestone:                    
   Component:  coreboot                     |      Keywords:                    
Dependencies:                               |   Patchstatus:  patch needs review
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Comment(by stepan):

 Please send a Signed-off according to
 http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure so we
 can use your code.

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Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/150#comment:1>
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