[coreboot] [RFC] ACPI for ASUS P2B/P2B-LS (Intel 440BX/82371EB)

Keith Hui buurin at gmail.com
Wed Apr 14 05:54:18 CEST 2010


Hi all,

Based on Idwer's RFC I tried adding ACPI to P2B-LS plus completing the
rest of the PIIX4 function 3 initialization.

This is a summary of what I did:

* I used the DSDT table from the final vendor BIOS. Not provided here
for obvious reasons, but I can tell you how to extract it.
* I also replicated the content of the PIIX4 function 3 config space
after booting with vendor BIOS, as below:

00:04.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 02)
00: 86 80 13 71 03 00 80 02 02 00 80 06 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 01 e4 00 00 00 00 00 20 1e 30 00 01 00 00 00 00
50: 00 58 19 00 c0 c8 3b 02 37 40 40 03 00 00 00 00
60: 90 02 e7 00 00 00 00 10 04 e4 11 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 01 e8 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 30 0f 00 00 00 00 00 00

One exception is 0x90-0x91 which has the SMBus host base address. I
kept it as 0x0f00.

* Idwer is trying to build ACPI 4.0 (!) tables. Since P2B-LS is
shipped when ACPI was still at 1.0, that's what I did. For booting XP,
even ACPI 2.0 compliance is sufficient.

This is a summary of what happens:

* I can no longer get POST codes on the PCI bus. POST codes still
appear on the ISA bus. Glad I picked a POST card that works on both
buses.
* Power off does not work. The last POST code to show before complete
kernel shutdown and hard drive spinning down is 0xF5.
* I don't how how to enter soft suspend in Linux (silly me -_-! ), so
I have not tested it.
* the sensor appears on ISA bus port 0x290, just like vendor BIOS.
* My SB AWE64 ISA card still got initialized and driver loaded, but no
sound. In fact ALSA can't even do I/O to the card. That apparently is
because PIIX4 needs to be configured to forward certain I/O port
ranges to ISA, and some of those port ranges can be further
configured. This would require detecting in runtime what ISA cards are
installed, what are they, and what I/O port ranges they would use.
Where in the source tree should I place such code? Southbridge?

The changes I made are described in two attached patches, one to
southbridge/intel/i82371eb, one to mainboard/asus/p2bls. My coreboot
and linux boot log is also attached.

This is also RFC and is not signed off at this point, but comments are welcome.

Regards
Keith
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