[coreboot] Inteltool patch v4

Stefan Reinauer stepan at coresystems.de
Wed Sep 30 20:12:09 CEST 2009


Maciej Pijanka wrote:
> On 30/09/2009, Uwe Hermann <uwe at hermann-uwe.de> wrote:
>   
>> On Sun, Sep 27, 2009 at 12:01:12AM +0200, Maciej Pijanka wrote:
>>     
>>> This is last version, includes detecting southbridge using
>>> device_class not device location on bus as Stefan suggested, also will
>>> tell if find more than one device with device_class 0x601 and notify
>>> which one it used (it will be first but may depend on order of devices
>>> inside structures returned by libpci).
>>>       
>> Thanks, committed as r4694 with some smaller changes. May need some more
>> work though.
>>
>>
>> Here's the output from one of my 440BX boards, which looks a bit strange:
>>
>> Intel CPU: Family 6, Model 8
>> Intel Northbridge: 8086:7190 (82443BX)
>> Intel Southbridge: 8086:7110 (82371AB/EB/MB)
>>
>>     
> [..]
>   
>> ============= PMBASE ============
>>
>> PMBASE = 0x0000 (IO)

> On all my machines that have 440BX or 440LX and are operational that i
> can run inteltool there i have same 0x0000 PM base regardless i have
> enabled power management in bios or not. And indeed i think it is odd.
> One idea that came to my mind was writing very short and dumb module
> that will claim some IO space and set pmbase register to point to that
> space and check again, but didn't found yet time to put pieces
> together.
>   

On that southbridge, PMBASE is not in the LPC/ISA bridge (FN0) but in
the PM device (FN3)

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