[coreboot] [PATCH] simplify coreboot PCI code
Stefan Reinauer
stepan at coresystems.de
Mon Sep 28 22:39:42 CEST 2009
Carl-Daniel Hailfinger wrote:
> On 27.09.2009 22:29, Carl-Daniel Hailfinger wrote:
>
>> On 27.09.2009 20:49, Stefan Reinauer wrote:
>>
>>
>>> Simplify coreboot PCI handling
>>>
>>> This patch drops the conf1/conf2 autodetection and replaces it by
>>> (usually northbridge specific) hardcodes.
>>>
>>> This patch also adds pci_domain_init() which needs to be called by
>>> mainboard enable_dev() functions in order to be able to use the pci
>>> config space functions. This allows to drop i386 specific code from
>>> generic files again...
>>>
>>> There is an even better approach to the PCI config space access in mainboard
>>> specific init files problem, but that should go into another patch:
>>>
>>> static void init(struct device *dev)
>>> {
>>> // Do the stuff here!
>>> }
>>>
>>> static void enable_dev(struct device *dev)
>>> {
>>> // Install an init function for this mainboard device
>>> dev->ops->init = init;
>>> }
>>>
>>> struct chip_operations mainboard_ops = {
>>> .enable_dev = enable_dev,
>>> };
>>>
>>> Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
>>>
>>>
>>>
>> I really like this patch. There are one or two things I don't understand
>> yet, but I hope stuff will become clearer tomorrow after testing. Will
>> ack after testing.
>>
>>
>
> Tested, ends up in a reboot loop. Sorry. Will post the logs (old vs.
> new) in an hour.
>
Oh, sorry to hear that. I have to admit, I sent that patch untested, as
I wanted to get it out asap.
> There were some irritating ACPI IRQ routing changes between r4614 and
> r4681 (IRQ lines with IRQ 0 were suddenly enabled), but they had no
> influence on booting.
>
Odd.. Can you do some bisecting?
Stefan
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